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CN-122027003-A - Ground detection equipment based on high-speed data transmission on satellite

CN122027003ACN 122027003 ACN122027003 ACN 122027003ACN-122027003-A

Abstract

The application relates to ground detection equipment based on high-speed data transmission on a satellite, and belongs to the technical field of satellite communication. The system comprises an industrial control module, a radio frequency module, a baseband module, a clock module and an interface module, wherein the interface module can simulate on-board multi-type signal interaction and realize communication and uploading control through a high-speed interface chip, and the matching level adaptation module can adapt to different external equipment levels and improve the multiplexing rate of hardware resources. The clock module adopts a phase-locked loop architecture to realize internal and external clock switching, effectively inhibits clutter, reduces clock noise and jitter, and ensures stable demodulation of downlink high-speed signals and rapid and accurate analysis of data. The whole equipment adopts a modularized design, each module is divided according to functions and can be replaced according to needs, different application scenes are flexibly adapted, the application range is widened, the stability and the high efficiency of data processing are improved, and reliable ground detection support is provided for the on-board high-speed data transmission equipment.

Inventors

  • TANG ZHIKAI

Assignees

  • 湖南斯北图科技有限公司

Dates

Publication Date
20260512
Application Date
20260331

Claims (10)

  1. 1. The ground detection device based on the on-satellite high-speed data transmission is characterized by comprising an industrial control module, a radio frequency module, a baseband module, a clock module and an interface module; The industrial control module is used as an upper computer to communicate with each module, and performs communication data transmission and instruction and relevant configuration parameters issuing through a communication interface connected with the baseband module and the interface module; the baseband module is used for receiving intermediate frequency signals output by the radio frequency module for high-order demodulation processing according to receiving instructions and related configuration parameters issued by the industrial control module through a communication interface after external signals are input to the radio frequency module, and feeding back data obtained by demodulation to the industrial control module through the communication interface, wherein the external signals are signals downloaded by the on-board high-speed data transmission equipment; the clock module is used for automatically switching internal and external clocks based on a phase-locked loop architecture and providing clock signals for the radio frequency module and the baseband module respectively; The interface module comprises a low-speed interface chip and a high-speed interface chip which are controlled by an FPGA, and is used for being in communication connection with external equipment according to an external interface provided by the interface chip, simulating low-speed and high-speed interactive communication between other on-board single machines and on-board high-speed data transmission equipment, and communicating with the on-board high-speed data transmission equipment and performing uploading control by receiving a simulated star affair instruction and an uploading instruction sent by the industrial control module, wherein a level adaptation module is configured between an RS422 interface chip in the low-speed interface chip and a CAN interface chip and the FPGA, and is used for switching the power supply voltage of the interface chip under the control of the FPGA and outputting a level required by adapting the external equipment through the external interface of the interface chip.
  2. 2. The on-board high-speed data transmission-based ground detection device according to claim 1, further comprising a power module, wherein the power module is composed of a filter circuit and an isolation power supply, and is configured to convert an input alternating current into a direct current, and provide the direct current to the industrial control module, the radio frequency module, the baseband module, the clock module and the interface module.
  3. 3. The ground detection device based on the on-satellite high-speed data transmission according to claim 2, wherein the industrial control module is configured with a USB interface, a VGA interface and an external gigabit network port, the USB interface and the VGA interface are used for being externally connected with a display screen, a keyboard and a mouse to realize single-machine operation, the external gigabit network port is used for being externally connected with a PC to realize remote control, the communication interfaces connected between the industrial control module and the baseband module and between the industrial control module and the interface module comprise PCIE and an internal gigabit network port, the PCIE is used for supporting high-speed transmission of high-capacity data, and the internal gigabit network port is used for issuing instructions and relevant configuration parameters to the baseband module and the interface module.
  4. 4. The ground detection device based on high-speed data transmission on satellite according to claim 2, wherein the radio frequency module comprises a first filter, a first amplifier, a second filter, a mixer, RXLO, a third filter, a second amplifier and a fourth filter which are sequentially connected; In the radio frequency module, a clock signal input by a clock module is directly transmitted to the RXLO, the RXLO provides a local oscillation clock signal, an input external signal is firstly subjected to primary filtering by the first filter and then is sent to the first amplifier for signal amplification, the amplified signal is filtered by the second filter and then enters the mixer, the mixer carries out signal mixing under the support of the local oscillation clock signal, the mixed signal is sent to the second amplifier for secondary amplification after passing through the third filter, and finally an intermediate frequency signal is output to a baseband module by the fourth filter.
  5. 5. The on-board high-speed data transmission-based ground detection device according to claim 4, wherein the baseband module comprises a high-performance FPGA, a clock distribution chip and a high-performance ADC; The high-performance FPGA is used for responding to a receiving instruction and related configuration parameters issued by the industrial control module through an internal gigabit network port in the communication interface after an external signal is input to the radio frequency module, and forwarding the related configuration parameters to the clock distribution chip and the high-performance ADC for related register configuration; After the high-performance FPGA completes the configuration of the clock distribution chip, the clock distribution chip is used for outputting an ADC clock required by the high-performance ADC according to a clock signal input by a clock module; After the high-performance FPGA completes configuration of the high-performance ADC, the high-performance ADC is used for receiving an intermediate frequency signal output by the radio frequency module to perform ADC conversion under the support of the ADC clock, inputting a digital signal obtained by conversion to the high-performance FPGA to perform high-order demodulation processing, and finally feeding back data obtained by demodulation to an industrial control module through PCIE in a communication interface.
  6. 6. The on-board high-speed data transmission-based ground detection device according to claim 5, wherein the high-order demodulation process includes matched filtering, timing synchronization, carrier synchronization, and demapping; The matched filtering is used for maximizing the signal-to-noise ratio of a known signal under the condition that channel noise exists, the implementation mode is that 32 paths of overlap preservation method frequency domain matched filtering is adopted, the circular convolution of a segmented sequence is used for replacing linear convolution during parallel processing to complete the fast Fourier transform and inverse fast Fourier transform of 64 points in parallel, the timing synchronization is used for completing the estimation of timing phase errors and carrying out phase rotation in a frequency domain to remove the timing errors, the carrier synchronization is used for extracting synchronous signals with the same frequency and the same phase as a carrier signal in an input signal and completing the calculation of the Doppler effect to eliminate the influence of carrier frequency offset and Doppler frequency shift, and the demapping is used for carrying out demapping operation on the processed signal to finally complete the extraction of a bit stream and provide original bit information for subsequent signal processing or data transmission.
  7. 7. The ground detection device based on-board high-speed data transmission according to claim 1,2, 4 or 5, wherein the clock module comprises a phase-locked loop, a monitoring circuit, a change-over switch, a constant-temperature crystal oscillator, a filtering and amplifying circuit and a power divider; The monitoring circuit is used for monitoring whether the clock module has external clock input or not and outputting a switching instruction according to the monitoring condition to perform switching control on an internal/external voltage-controlled pin of the switching switch, wherein when the external clock input does not exist, the switching switch is controlled to be switched to the internal voltage-controlled pin, the voltage-controlled pin of the constant-temperature crystal oscillator is controlled through a fixed level in the clock module at the moment, when the external clock input exists, the switching switch is controlled to be switched to the external voltage-controlled pin, and at the moment, the input external clock and the clock output by the constant-temperature crystal oscillator are subjected to phase synchronization in the phase-locked loop and the voltage-controlled level is output to the constant-temperature crystal oscillator; The filtering and amplifying circuit is connected with the constant-temperature crystal oscillator and is used for filtering and amplifying a clock output by the constant-temperature crystal oscillator and outputting the clock to the power divider, and the power divider divides a clock signal into two paths and provides the two paths of clock signals for the radio frequency module and the baseband module respectively.
  8. 8. The ground detection device based on the on-board high-speed data transmission according to claim 1, wherein in the interface module, the low-speed interface chip comprises an RS422 interface chip, an RS485 interface chip, a CAN interface chip and an LVDS interface chip, wherein the RS422 interface chip, the RS485 interface chip and the CAN interface chip are respectively used for completing the self-loop test of the internal interface of the module through an external cable and simultaneously used for communicating with external devices, the LVDS interface chip comprises 12 differential pairs for receiving and transmitting six paths, three paths of transmission and three paths of reception form a group of LVDS, and one group of LVDS is designed into one-path clock receiving and transmitting, one-path enabling receiving and one-path data receiving and transmitting according to an on-board LVDS communication protocol; The high-speed interface chip is connected with a GTX (gate transfer line) Bank and an HP (high-speed) Bank area in the FPGA and comprises a CXP (signal processing) interface chip, a 2711 interface and a Camellia link interface chip, wherein the CXP interface chip is an industrial camera interface, the highest speed supports 12.5Gbps, the on-board common speed is 3.125Gbps, the 2711 interface is a high-speed serial interface, the common speed is 1.6Gbps to 2.5Gbps, the Camellia link interface chip is an image acquisition interface, and the parallel-serial conversion design is carried out by adopting a standard LVDS differential pair and COMS (complementary metal oxide semiconductor) so as to support the pixel clock of 85MHz at the highest.
  9. 9. The ground detection device based on the on-satellite high-speed data transmission according to claim 8, wherein the RS422 interface chip in the low-speed interface chip and the level adaptation module configured between the CAN interface chip and the FPGA are composed of a relay and a level conversion chip, the relay is respectively connected with the FPGA, the level conversion chip and the interface chip, and the input end of the relay is externally connected with power supply voltages with different levels; The level adaptation module is used for selecting proper voltage as power supply voltage of the level conversion chip and the interface chip through switching of the switch of the FPGA control relay, simultaneously adapting the level required by the interface chip and the FPGA through the level conversion chip, and outputting the level required by the adaptation external equipment through the external interface of the interface chip, thereby reducing the number of the external interfaces of the interface chips of the same type.
  10. 10. The ground detection device based on-satellite high-speed data transmission according to claim 1, wherein the baseband module and the interface module further comprise memory chips respectively connected with a high-performance FPGA in the baseband module and an FPGA in the interface module, and the memory chips are respectively used for storing data obtained by high-order demodulation processing of the high-performance FPGA and communication data obtained by control interactive communication of the FPGA.

Description

Ground detection equipment based on high-speed data transmission on satellite Technical Field The application relates to the technical field of satellite communication, in particular to ground detection equipment based on satellite high-speed data transmission. Background With the rapid evolution of modern communication technology, satellite high-speed data transmission technology has become a core research direction in the field of aerospace communication by virtue of the speed advantage of the satellite high-speed data transmission technology in mass data transmission. Development of matched ground detection (ground detection for short) equipment is synchronously advanced while the high-speed data transmission equipment on the star is in attack and closure. The ground detection device has the core functions of simulating the signal interaction scene of other on-board single machines and high-speed data transmission devices, receiving data downloaded by the data transmission devices and completing high-order demodulation, and finally realizing the rapid receiving and analyzing of downlink data, thereby providing support for performance verification and on-orbit application of the on-board devices. However, the conventional ground detection equipment has obvious limitations, and is intensively represented by a short board with insufficient function suitability and clock stability, wherein firstly, the short board has limited functions and interface coverage, part of equipment only supports the processing of downlink low-speed data of on-board equipment and cannot adapt to a high-speed transmission scene, and the other equipment can simulate the interaction of on-board single machine and data transmission equipment, but the supported interface type and communication protocol range are narrow, most of common interface requirements in the aerospace field are difficult to cover, and the universality and the suitability are insufficient. Secondly, the internal clock architecture has a short board, and the clock of the existing ground detection equipment adopts a frequency multiplier architecture, and the architecture is easy to be interfered by the outside to cause clock jitter, so that the sampling precision and demodulation stability of downlink data are affected, and especially when high-speed and large-bandwidth data are processed, the signal synchronization deviation is possibly aggravated, and the overall data processing performance is restricted. Disclosure of Invention Based on the above, it is necessary to provide a ground detection device based on-board high-speed data transmission, which can simulate interaction of various high-speed or low-speed signals between other on-board single machines and on-board high-speed data transmission devices and perform stable high-order demodulation on the downlink high-speed signals of the on-board high-speed data transmission devices, so as to realize rapid receiving and accurate analysis of downlink data. The ground detection equipment based on the on-satellite high-speed data transmission comprises an industrial control module, a radio frequency module, a baseband module, a clock module and an interface module; the industrial control module is used as an upper computer to communicate with each module, and performs communication data transmission and instruction and relevant configuration parameters issuing through a communication interface connected with the baseband module and the interface module; The baseband module is used for receiving intermediate frequency signals output by the radio frequency module, performing high-order demodulation processing on the intermediate frequency signals, and feeding back the demodulated data to the industrial control module through the communication interface after external signals are input to the radio frequency module according to receiving instructions and related configuration parameters issued by the industrial control module through the communication interface; the clock module is used for automatically switching internal and external clocks based on a phase-locked loop architecture and providing clock signals for the radio frequency module and the baseband module respectively; The interface module comprises a low-speed interface chip and a high-speed interface chip which are controlled by the FPGA, and is used for being in communication connection with external equipment according to an external interface provided by the interface chip, simulating low-speed and high-speed interactive communication between other on-board single machines and on-board high-speed data transmission equipment, and communicating with the on-board high-speed data transmission equipment and performing uploading control by receiving a simulated star command and an uploading command sent by the industrial control module, wherein a level adaptation module is configured between an RS422 interface chip in the low-speed interface chip and a CAN inte