CN-122027128-A - Processing device of password service and electronic equipment

CN122027128ACN 122027128 ACN122027128 ACN 122027128ACN-122027128-A

Abstract

The application provides a processing device and electronic equipment of a password service, wherein the device comprises a processor, a plurality of post quantum password algorithm modules and a plurality of multiplication units in different modes, the multiplication units in different modes are used for executing multiplication operations with different bit widths and/or different types, the processor is used for determining a target post quantum password algorithm from the plurality of post quantum password algorithms according to a received password service request, decomposing the target post quantum password algorithm according to the bit width and/or the type of the multiplication operation to obtain at least one target sub operation with at least one bit width and/or type, sending the target sub operation to the post quantum password algorithm module in communication connection with the multiplication unit for realizing the target sub operation, and the post quantum password algorithm module is used for calling the corresponding multiplication unit according to the target sub operation to obtain a sub result, and the processor is also used for obtaining the sub result and realizing the target post quantum password algorithm according to the sub result to obtain the processing result of the password service.

Inventors

GAO YUBO
CHEN QIANG
SHOU NANQING
GAO XIONG
LIU LIE

Assignees

深圳市纽创信安科技开发有限公司

Dates

Publication Date: 20260512
Application Date: 20260116

Claims (10)

1. A processing device of a cryptographic service is characterized by comprising a processor, a plurality of post quantum cryptographic algorithm modules and a plurality of multiplication units in different modes, wherein the multiplication units in different modes are used for executing multiplication operations with different bit widths and/or different types, the post quantum cryptographic algorithm modules are in communication connection with the multiplication units in at least one mode, The processor is used for determining a target post quantum cryptographic algorithm from a plurality of post quantum cryptographic algorithms according to a received cryptographic service request, decomposing the target post quantum cryptographic algorithm according to the bit width and/or type of multiplication operation to obtain at least one target sub-operation of the bit width and/or type, and sending the target sub-operation to a post quantum cryptographic algorithm module which is in communication connection with a multiplication unit for realizing the target sub-operation according to a preset first mapping relation, wherein the first mapping relation is used for representing the corresponding relation between the bit width and/or type of the multiplication operation and the post quantum cryptographic algorithm module; the post quantum cryptography algorithm module is used for calling the corresponding multiplication unit according to the bit width and/or type of the target sub-operation and a preset second mapping relation to realize the target sub-operation and obtain a sub-result; the processor is also used for obtaining the sub-result, and realizing the target post-quantum cryptographic algorithm according to the sub-result to obtain the processing result of the cryptographic service.
2. The apparatus of claim 1, wherein the post quantum cryptography algorithm module is further configured to Determining M data to be operated according to the target sub-operation under the condition that the target sub-operation is a half-length multiplication operation with the bit width smaller than or equal to N; When M is larger than 1, inputting the data to be operated to a first multiplier in a first multiplication unit in a dividing way to obtain M first operation results; and obtaining the sub-result of the target sub-operation according to the M first operation results.
3. The apparatus of claim 1, wherein the device comprises a plurality of sensors, The post quantum cryptography algorithm module is further used for determining X data to be operated according to the target sub-operation when the target sub-operation is half-length modular multiplication operation with the bit width smaller than or equal to N; The second multiplication unit is used for carrying out operation on the data to be operated through a second multiplier in the second multiplication unit to obtain a first intermediate result, carrying out operation on the data obtained after the first intermediate result is obtained by taking the high order and a first barrett parameter through a third multiplier in the second multiplication unit to obtain a second intermediate result, carrying out operation on the data obtained after the second intermediate result is obtained by taking the high order and a second barrett parameter through a fourth multiplier in the second multiplication unit to obtain a third intermediate result, determining a second operation result according to the first intermediate result and the third intermediate result, wherein the first barrett parameter and the second barrett parameter are obtained according to a predefined first modulus, and the bit widths of the data obtained after the first intermediate result is obtained by taking the high order and the data obtained after the second intermediate result is less than or equal to N; And the post quantum cryptography algorithm module is also used for obtaining the sub-result of the target sub-operation according to the X second operation results.
4. The apparatus of claim 1, wherein the device comprises a plurality of sensors, The post quantum cryptography algorithm module is further used for determining Y to-be-operated data according to the target sub-operation when the target sub-operation is a full-length multiplication operation with the bit width smaller than or equal to 2N and larger than N, dividing a multiplier in the to-be-operated data into first high-order data and first low-order data for each pair of to-be-operated data, dividing a multiplicand in Y pairs of to-be-operated data into second high-order data and second low-order data respectively, and inputting the first high-order data, the first low-order data, the second high-order data and the second low-order data into a third multiplication unit; The third multiplication unit is used for calculating the first high-order data and the second high-order data through a fifth multiplier in the third multiplication unit to obtain a fourth intermediate result, calculating the first high-order data and the second low-order data through a sixth multiplier in the third multiplication unit to obtain a fifth intermediate result, calculating the second low-order data and the second high-order data through a seventh multiplier in the third multiplication unit to obtain a sixth intermediate result, calculating the second low-order data and the second low-order data through an eighth multiplier in the third multiplication unit to obtain a seventh intermediate result, and calculating the fourth intermediate result, the fifth intermediate result, the sixth intermediate result and the seventh intermediate result through a first adder in the third multiplication unit to obtain a third operation result; And the post quantum cryptography algorithm module is also used for obtaining the sub-result of the target sub-operation according to the Y third operation results.
5. The apparatus of claim 1, wherein the device comprises a plurality of sensors, The post quantum cryptography algorithm module is further used for determining Q data to be operated according to the target sub-operation under the condition that the target sub-operation is full-length modular multiplication operation with the bit width smaller than or equal to 2N and larger than N, dividing a multiplier in the data to be operated into third high-order data and third low-order data and dividing a multiplicand in the data to be operated into fourth high-order data and fourth low-order data aiming at each pair of the data to be operated, and respectively inputting the third high-order data, the third low-order data, the fourth high-order data and the fourth low-order data into a fourth multiplication unit; The fourth multiplication unit is used for carrying out two-by-two operation on the third high-order data, the third low-order data, the fourth high-order data and the fourth low-order data through a first multiplication subunit in the fourth multiplication unit to obtain an eighth intermediate result, carrying out operation on the data with the high-order data and a third barrett parameter of the eighth intermediate result through a second multiplication subunit in the fourth multiplication unit to obtain a ninth intermediate result, carrying out operation on the data with the high-order data and a fourth barrett parameter of the ninth intermediate result through a third multiplication subunit in the fourth multiplication unit to obtain a tenth intermediate result, and determining a fourth operation result according to the eighth intermediate result and the tenth intermediate result, wherein the third barrett parameter and the fourth barrett parameter are obtained according to a predefined second modulus; and the post quantum cryptography algorithm module is further used for obtaining a sub-result of the target sub-operation according to the Q fourth operation results.
6. The apparatus of claim 5, wherein the first multiplication subunit comprises a ninth multiplier, a tenth multiplier, an eleventh multiplier, a twelfth multiplier, and a second adder; And performing a pairwise operation on the third high-order data, the third low-order data, the fourth high-order data and the fourth low-order data by the first multiplication subunit in the fourth multiplication unit, and adding the operations to obtain an eighth intermediate result, where the method includes: the ninth multiplier is used for calculating the third high-order data and the fourth high-order data to obtain an eleventh intermediate result; operating the third high-order data and the fourth low-order data through the tenth multiplier to obtain a twelfth intermediate result; calculating the third low-order data and the fourth high-order data through the eleventh multiplier to obtain a thirteenth intermediate result; calculating the third low-order data and the fourth low-order data through the twelfth multiplier to obtain a fourteenth intermediate result; And performing shift addition on the eleventh intermediate result, the twelfth intermediate result, the thirteenth intermediate result and the fourteenth intermediate result through the second adder to obtain the eighth intermediate result.
7. The apparatus of claim 6, wherein the second multiplier subunit, the third multiplier subunit, and the first multiplier subunit are identical in structure and the second multiplier subunit and the third multiplier subunit are connected in series.
8. The apparatus of claim 1, wherein the device comprises a plurality of sensors, The post quantum cryptography algorithm module is further used for determining P to-be-operated data according to the target sub-operation when the target sub-operation is a double-length multiplication operation with the bit width smaller than or equal to 4N and larger than 2N, decomposing a multiplier in the to-be-operated data into a sum of N times of first decomposed data and second decomposed data and decomposing a multiplicand in the to-be-operated data into a sum of N times of third decomposed data and fourth decomposed data, and inputting the P to a fifth multiplying unit respectively, wherein the bit width of the first decomposed data, the second decomposed data, the third decomposed data and the fourth decomposed data is smaller than or equal to 2N and larger than N; The fifth multiplication unit is used for calculating the first decomposition data and the third decomposition data through a fourth multiplication subunit in the fifth multiplication unit to obtain a fifteenth intermediate result, calculating the second decomposition data and the fourth decomposition data through a fifth multiplication subunit in the fifth multiplication unit to obtain a sixteenth intermediate result, calculating the first decomposition data and the second decomposition data through a third adder in the fifth multiplication unit to obtain a first addition result, calculating the third decomposition data and the fourth decomposition data through a third adder in the fifth multiplication unit to obtain a second addition result, calculating the first addition result through a sixth multiplication subunit in the fifth multiplication unit to obtain a seventeenth intermediate result, and calculating the fifteenth intermediate result, the sixteenth intermediate result and the seventeenth intermediate result through a fourth adder in the fifth multiplication unit to obtain a seventeenth intermediate result; The post quantum cryptography algorithm module is further configured to determine a fifth operation result according to the fifteenth intermediate result, the sixteenth intermediate result and the eighteenth intermediate result for each pair of data to be operated, and obtain a sub-result of the target sub-operation according to the P fifth operation results.
9. The apparatus according to any one of claims 1 to 8, further comprising a memory; The storage is used for storing the sub-result obtained by the post quantum cryptography algorithm module; the memory is also in communication with the processor, and the processor is configured to obtain the sub-result from the memory.
10. An electronic device, characterized in that it comprises processing means of the cryptographic service of any one of claims 1 to 9.

Description

Processing device of password service and electronic equipment Technical Field The present application relates to the field of information security technologies, and in particular, to a processing apparatus and an electronic device for a cryptographic service. Background With the development of quantum computing technology, traditional public key cryptography is at risk of being efficiently cracked. To cope with this challenge, post quantum cryptography algorithms have been developed, which are constructed based on mathematical problems against quantum attacks, guaranteeing information security in the quantum computing era. The lattice-based cryptographic algorithm is an important direction of the post quantum cryptography because of the characteristics of high operation efficiency, small key size and the like. Disclosure of Invention The embodiment of the application provides a processing device and electronic equipment for password service, which can efficiently complete the operation of different post quantum password algorithms through the same hardware resource, improve the utilization rate of the hardware resource, reduce the hardware redundancy and support the expansion of a new post quantum password algorithm in the future. The technical scheme of the embodiment of the application is realized as follows: In a first aspect, an embodiment of the present application provides a processing device for cryptographic services, including a processor, a plurality of post quantum cryptographic algorithm modules and a plurality of different modes of multiplication units, where the different modes of multiplication units are used for executing multiplication operations with different bit widths and/or different types, the post quantum cryptographic algorithm modules are in communication connection with at least one mode of multiplication units, where the processor is used for determining a target post quantum cryptographic algorithm from the plurality of post quantum cryptographic algorithms according to a received cryptographic service request, decomposing the target post quantum cryptographic algorithm according to a bit width and/or a type of the multiplication operation to obtain a target sub-operation with at least one bit width and/or type, sending the target sub-operation to a post quantum cryptographic algorithm module in communication connection with a multiplication unit implementing the target sub-operation according to a preset first mapping relation, the first mapping relation is used for characterizing a correspondence between a bit width and/or a type of the target sub-operation and the post quantum cryptographic algorithm module, the post quantum cryptographic algorithm module is used for determining a target post quantum cryptographic algorithm from the plurality of post quantum cryptographic algorithms according to the received cryptographic service request, and obtaining a second mapping relation between the target sub-operation and a second mapping relation is used for implementing the target sub-operation and/or a second sub-operation, and a result is obtained according to the preset first mapping relation, and the second mapping relation is used for implementing the target sub-operation and the target cryptographic algorithm. In a second aspect, an embodiment of the present application provides an electronic device, where the electronic device includes a processing apparatus for a cryptographic service according to the embodiment of the present application. The embodiment of the application has the following beneficial effects: The multiplication units of a plurality of different modes for executing multiplication operations with different bit widths and/or different types are integrated in the processing device of the cryptographic service, so that corresponding multiplication units can be called by the post quantum cryptographic algorithm module for a plurality of post quantum cryptographic algorithms to realize the post quantum cryptographic algorithms. Thus, the method is beneficial to efficiently completing the operation of different post quantum cryptography algorithms through the same hardware resource. In addition, the application can improve the resource utilization rate of the multiplication unit by calling the multiplication unit with the corresponding bit width and/or type, reduce hardware redundancy, support the expansion of a future new quantum cryptographic algorithm and improve the universality and flexibility of the processing device of the cryptographic service. Drawings The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is evident that the drawings in the following description are only some embodiments of the present application and that other drawings may be obtained from these draw