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CN-122027391-A - Ringing suppression circuit suitable for CAN FD transceiver

CN122027391ACN 122027391 ACN122027391 ACN 122027391ACN-122027391-A

Abstract

The invention discloses a ringing suppression circuit suitable for a CAN FD transceiver, which comprises a state detection circuit, a ringing suppression time control circuit and a suppression element, wherein the state detection circuit is used for identifying the edge of the transition from a dominant state to a recessive state on a CAN bus, and triggering signals are turned over after the state transition is detected, and the ringing suppression time control circuit receives the triggering signals, and the suppression element is connected between buses CANH and CANL after the triggering signals are received and is disconnected after a period of time is kept. The invention has the characteristics of high response speed and high inhibition efficiency.

Inventors

  • ZHANG LI
  • LIU WEIFENG
  • LI WENBO

Assignees

  • 西安电子科技大学

Dates

Publication Date
20260512
Application Date
20260311

Claims (10)

  1. 1. The ringing suppression circuit suitable for the CAN FD transceiver is characterized by comprising a state detection circuit, a ringing suppression time control circuit and a suppression element; the state detection circuit is used for identifying the edge of the conversion from the dominant state to the recessive state on the CAN bus, and outputting a trigger signal after detecting the state conversion; The ringing suppression time control circuit receives the trigger signal, switches the suppression element between the buses CANH and CANL after receiving the trigger signal, and disconnects after a period of time.
  2. 2. The ringing suppression circuit of claim 1, wherein the state detection circuit includes two detection modes, namely, a detection mode for detecting a time when the feedforward TXD signal is switched from a low level to a high level, a detection mode for detecting a time when the differential signal between the buses CANH and CANL is switched from a high level to a low level, and a detection mode for detecting a time when the differential signal between the feedforward signal and the bus CANH is switched from a high level to a low level, wherein the detection mode is a mode that the trigger signal becomes a high level when a dominant-to-recessive switching occurs between the feedforward signal and the bus signal, and the detection mode is a mode that the trigger signal becomes a low level.
  3. 3. The ring suppression circuit for a CAN FD transceiver of claim 1, wherein the state detection circuit is coupled to a data input TXD of the CAN transceiver and CANH and CANL terminals of a CAN transceiver bus; The state detection circuit detects state changes of the feedforward signal TXD and the bus signals CANH and CANL respectively, and the trigger signal controls the on and off of the suppression time control circuit.
  4. 4. A ringing suppression circuit for a CAN FD transceiver as in claim 3, wherein the suppression time control circuit has an input coupled to the state detection circuit output and an output coupled to the suppression element and controlling whether the suppression element is on; The suppression element is connected between the buses CANH and CANL.
  5. 5. A ringing suppression circuit for a CAN FD transceiver according to claim 3, wherein the state detection circuit comprises a comparator and an or gate, the comparator input is connected to CANH and CANL buses of the CAN transceiver respectively, the or gate input is connected to the comparator output respectively, one end is coupled to the TXD terminal, and the output is coupled to the input of the suppression time control circuit to realize the state detection function.
  6. 6. The ringing suppression circuit of claim 5, wherein the comparator detects a level transition of the differential signal between CANH and CANL to a logic signal; the TXD signal is a logic signal, the differential signal between CANH and CANL is converted into the logic signal by a comparator, an OR gate detects the change of the two logic signals, recognizes that the TXD signal is switched from a low level to a high level and the differential signal between CANH and CANL is switched from a high level to a low level, and generates a trigger signal.
  7. 7. A ringing suppression circuit for a CAN FD transceiver as in claim 3, wherein the output of the suppression time control circuit is coupled to a suppression element access control terminal to control the suppression element to be connected to or disconnected from the bus, the suppression element including a matching resistor and a clipping diode in parallel to suppress ringing.
  8. 8. The ring suppression circuit of claim 3, wherein the feedforward path of the state detection circuit comprises a buffer1, a resistor R1 and a capacitor C1, the TXD terminal is coupled to the input terminal of the buffer1, the output of the buffer1 is coupled with a delay unit formed by the resistor R1 and the capacitor C1, the output of the delay unit is connected with the NOR input terminal of the OR gate; The feedback path comprises an N-type MOS tube NM1, a resistor R3 and a Buffer2, wherein the grid electrode of the N-type MOS tube NM1 is coupled to a CANH end, the source electrode of the N-type MOS tube NM1 is coupled to the CANL end, the drain electrode of the N-type MOS tube NM1 is coupled with the input of the resistor R3 and the Buffer2, the output of the Buffer2 is coupled to the NOR input end of the OR gate, the output of the OR gate is a trigger signal and is coupled to the input end of a suppression time control circuit, when a TXD signal is switched from low level to high level, the output of the Buffer1 is also switched from low level to high level, the output signal of the Buffer1 is delayed by the resistor R1 and the capacitor C1 and then is also switched to high level, the grid voltage of the PM1 is lower than the source voltage, PM1 is turned on, VSW is changed to high level so as to activate a switch, a suppression element is accessed, after the delay time set by the resistor R2 and the capacitor C2, the PM1 grid electrode is changed to high level so that PM1 is turned off, the suppression element is turned off, and the VSW is turned off; When the differential signal between CANH and CANL is switched from high level to low level, NM3 turns off to cause NM3 drain terminal to become high level, so Buffer2 also outputs high level to one end of OR gate, then OR gate output becomes high level, PM1 gate voltage is lower than source voltage, PM1 turns on, VSW becomes high level to activate switch, ringing suppression element is connected, PM1 gate becomes high level after delay time set by resistor R2 and capacitor C2, PM1 turns off to make VSW become low level, switch turns off, suppression element is disconnected from CAN bus.
  9. 9. The ringing suppression circuit of claim 7, wherein the suppression time control circuit comprises a resistor R2, a resistor R4, a capacitor C2, and a P-type MOS tube PM1, wherein the gate of the P-type MOS tube PM1 is connected to one end of the resistor R2 and one end of the capacitor C2, the source of the P-type MOS tube PM1 is coupled to the other end of the resistor R2, the drain of the P-type MOS tube PM1 is coupled to one end of the resistor R4, the resistor R4 and the capacitor C2 are coupled and connected to ground potential, the input of the Buffer3 is coupled to the drain of the PM1, and the output V SW is coupled to the suppression element.
  10. 10. The ring suppression circuit of claim 9, wherein the suppression element comprises a control switch, a matching resistor RC and a clipping diode D1, wherein one end of the control switch is coupled to CANH, one contact is an output V SW , and the other contact is one end of the matching resistor and the clipping diode in parallel; The control switch is controlled by V SW , when V SW is high level, the control switch is connected with the matching resistor and the limiting diode which are connected in parallel, the suppressing element is connected, and otherwise, the suppressing element is disconnected.

Description

Ringing suppression circuit suitable for CAN FD transceiver Technical Field The invention belongs to the technical field of complex controller local area networks, and particularly relates to a ringing suppression circuit suitable for a CAN FD transceiver. Background In complex controller area network (Controller Area Network, CAN) communication networks, the use of star topologies and hybrid topologies CAN exacerbate the signal ringing phenomenon. Although CAN bus flexible data rate (CAN FD) brings advantages of faster data rate and longer payload, communication rate is limited because signal ringing is not dependent on transmission rate. And the conventional ringing suppression circuit has the problems of poor suppression efficiency and slow response speed. The traditional method for realizing the ringing suppression circuit based on the bus state detection detects the transition from dominant state to hidden state according to the received bus voltage and reduces the impedance of the ringing suppression circuit for a certain time while suppressing the ringing. The prior technical proposal mainly has the defects of poor inhibition efficiency and low triggering speed. The CAN communication network adopts a half duplex communication mode, and only one node is allowed to transmit data at the same time, and the node is called a transmitting node, and the other nodes are called receiving nodes. A typical CAN node includes a CAN transceiver, a CAN controller, and an electronic control unit (MCU). The transmitting node will be controlled by the TXD signal to drive the bus. In one aspect, the feedforward-based ringing suppression circuit only works on CAN nodes in the transmit state. Because positive total reflection contribution ringing noise is also generated at other receiving nodes at the connection point of the CAN bus and the CAN node due to impedance mismatch in a recessive state, and the feedforward-based ringing suppression circuit only responds to the data transmission signal TXD, a part of ringing suppression effect is sacrificed in this way, and higher-rate application is limited. On the other hand, a ringing suppression circuit based on bus state detection, though acting simultaneously at multiple nodes, improves ringing and increases potential topology size. However, there is an inherent delay in the trigger speed, and the latest activation time is a key parameter to quickly remove energy in the ring and stabilize the signal below the 500mV threshold. If the bus signal glitch is additionally filtered to ensure accurate detection, additional delay is introduced, further slowing down the reaction time. The result is that when considering bit rates exceeding 2Mbps, the trigger time will become the main bottleneck for this approach. Disclosure of Invention In order to overcome the defects in the prior art, the invention aims to provide a ringing suppression circuit suitable for a CAN FD transceiver, which has the characteristics of high response speed and high suppression efficiency. In order to achieve the above purpose, the technical scheme adopted by the invention is as follows: A ringing suppression circuit suitable for CAN FD transceiver comprises a state detection circuit, a ringing suppression time control circuit and a suppression element; the state detection circuit is used for identifying the edge of the conversion from the dominant state to the recessive state on the CAN bus, and outputting a trigger signal after detecting the state conversion; The ringing suppression time control circuit receives the trigger signal, and after receiving the trigger signal, the suppression element is connected between the buses CANH and CANL and disconnected after a period of time, and the setting of the holding time accords with the international standard. After the suppressing element is connected to the circuit, the resistance of the receiver in the recessive state is reduced by tens of kiloohms to the characteristic impedance of the bus, and the amplitude of ringing suppression is limited to avoid the false overturn of the received signal caused by excessive ringing. The state detection circuit comprises two detection modes, namely a first detection mode and a second detection mode, wherein the first detection mode is used for detecting the moment when a feedforward TXD signal is switched from a low level to a high level, and the second detection mode is used for detecting the moment when a differential signal between two detection buses CANH and CANL is switched from the high level to the low level. The two are or relations, namely when the feed-forward signal and the bus signal have a dominant-recessive switching, the trigger signal becomes high level, otherwise, the trigger signal becomes low level. The state detection circuit is coupled to the data input TXD of the CAN transceiver and to CANH and CANL terminals of the CAN transceiver bus. The state detection circuit detects the state changes of the fee