CN-122027423-A - Deep space high code rate signal receiving demodulation device

CN122027423ACN 122027423 ACN122027423 ACN 122027423ACN-122027423-A

Abstract

The invention discloses a deep space high code rate signal receiving and demodulating device, belonging to the field of communication and data transmission. The device comprises a digital quadrature down-conversion unit, a low-pass filtering unit, a digital resampling unit, a matched filtering unit, a half symbol shifting unit, a coherent AGC unit, a carrier error compensation unit, a decimation unit, a carrier phase error extraction unit, a timing error extraction unit, a noncoherent AGC unit, a carrier Doppler frequency offset estimation unit and a carrier judgment locking unit. The invention has the characteristics of high implementation reliability, high stability, low implementation complexity and the like.

Inventors

LI CHAO
GAO YANSHENG
TIAN ZHIJUN
ZHAO XIANMING
CHENG YAYONG
Ning Zichen
HOU YONGBIN

Assignees

中国电子科技集团公司第五十四研究所

Dates

Publication Date: 20260512
Application Date: 20260130

Claims (2)

1. The deep space high code rate signal receiving and demodulating device is characterized by comprising a digital quadrature down-conversion unit (1), a low-pass filtering unit (2), a digital resampling unit (3), a matched filtering unit (4), a first half symbol shifting unit (5-1), a second half symbol shifting unit (5-2), a third half symbol shifting unit (5-3), a coherent AGC unit (6), a carrier error compensating unit (7), a first extracting unit (8-1), a second extracting unit (8-2), a third extracting unit (8-3), a carrier phase error extracting unit (9), a timing error extracting unit (10), a non-coherent AGC unit (11), a carrier Doppler frequency offset estimating unit (12) and a carrier judging and locking unit (13).
2. The deep space high code rate signal receiving and demodulating device according to claim 1, wherein the digital quadrature down-conversion unit (1) performs digital down-conversion processing on the intermediate frequency sampling signal, and utilizes the input carrier doppler frequency offset estimation signal to complete carrier coarse synchronization of the input intermediate frequency sampling signal, and simultaneously generates and outputs two paths of I/Q quadrature baseband signals; the low-pass filtering unit (2) processes the I/Q two-way quadrature baseband signals output by the digital quadrature down-conversion unit (1), and transmits the processed I/Q two-way quadrature baseband signals to the digital resampling unit (3); the digital resampling unit (3) utilizes the input symbol rate setting value and timing error to complete the timing synchronization of the I/Q two-way quadrature baseband signals, and simultaneously generates and outputs 2 times of sampled I/Q two-way quadrature baseband signals; The matched filtering unit (4) carries out filtering processing on 2 times of sampled I/Q two-way quadrature baseband signals and outputs the filtered signals, the output I/Q two-way quadrature baseband signals are shunted to generate two groups of I/Q quadrature baseband signals, wherein the first group of I/Q quadrature baseband signals are transmitted to the first half symbol shifting unit (5-1), and the second group of I/Q quadrature baseband signals are transmitted to the incoherent AGC unit (11); The first half symbol shifting unit (5-1) keeps the input I path signal unchanged and outputs the input Q path signal delayed shifting by one sampling time and outputs the input Q path signal according to the input modulation system setting value, and keeps the I/Q path signals unchanged and outputs the I/Q path signal when the modulation system setting value is OQPSK; The coherent AGC unit (6) receives the signal output by the first half symbol shifting unit (5-1), performs power detection on the two paths of peak point position signals of the I/Q in the received signal, performs power adjustment on the input signal according to the detection value, and outputs the signal; The carrier error compensation unit (7) receives signals output by the coherent AGC unit (6), carries out carrier phase error compensation processing on input I/Q quadrature baseband signals according to input carrier phase error values, further completes carrier synchronization of the signals, and outputs I/Q two paths of quadrature baseband signals after carrier synchronization, wherein the I/Q two paths of quadrature baseband signals output by the carrier error compensation unit (7) are split to generate three groups of I/Q quadrature baseband signals, a first group of I/Q quadrature baseband signals are transmitted to the timing error extraction unit (10), a second group of I/Q quadrature baseband signals are transmitted to the first extraction unit (8-1), and a third group of I/Q quadrature baseband signals are transmitted to the third half symbol shifting unit (5-3); the timing error extraction unit (10) calculates the input I/Q quadrature baseband signal to generate a timing error and transmits the timing error to the digital resampling unit (3); A first extraction unit (8-1) extracts the peak point position signal of the input signal and transmits the extracted signal to a carrier phase error extraction unit (9); The carrier phase error extraction unit (9) carries out carrier phase error calculation on the input I/Q quadrature baseband signal according to the input modulation system setting parameters and transmits the carrier phase error to the carrier phase error compensation unit (7); The third half symbol shifting unit (5-3) controls and regularly detects the carrier locking indication signal output by the carrier judging and locking unit (13) through an internal timer, when the carrier at the detection moment is locked, the existing signal output state is kept, when the carrier at the detection moment is in an unlocking state, the Q-path signal is kept unchanged, the I-path signal is circularly switched to be output in a straight-through output or delayed and staggered mode for one sampling moment to be output, and the switching output state of the output signal is continuously kept after switching until the next carrier locking detection moment, and the output signal is switched according to a new detection result; The third extraction unit (8-3) extracts the peak point position signal of the input signal and transmits the extracted signal to the carrier judgment locking unit (13); the carrier judgment locking unit (13) detects the carrier locking state of the input signal and transmits the detected carrier locking state to the third half symbol shifting unit (5-3) and the second half symbol shifting unit (5-2) respectively; The incoherent AGC unit (11) detects the total power of signals of the peak point and the zero crossing point of the input signal, adjusts the power of the input signal according to the detection value, and outputs the power to the second half symbol shifting unit (5-2); the second half symbol shifting unit (5-2) controls and regularly detects the carrier locking indication signal output by the carrier judging and locking unit (13) through an internal timer, when the carrier at the detection moment is locked, the existing signal output state is kept, when the carrier at the detection moment is in an unlocking state, the Q-path signal is kept unchanged, the I-path signal is circularly switched to be output in a straight-through output or delayed and staggered mode for one sampling moment to be output, and the switching output state of the output signal is continuously kept after switching until the next carrier locking detection moment, and the output signal is switched according to a new detection result; the second extraction unit (8-2) extracts the peak point position signal of the input signal and transmits the extracted signal to the carrier Doppler frequency offset estimation unit (12); the carrier Doppler frequency offset estimation unit (12) carries out carrier Doppler frequency offset estimation on the input I/Q quadrature baseband signals according to the input modulation system setting parameters, and transmits the frequency offset estimation value to the digital quadrature down-conversion unit (1).

Description

Deep space high code rate signal receiving demodulation device Technical Field The invention relates to the field of communication and data transmission, in particular to a deep space high code rate signal receiving and demodulating device which can be used for receiving and demodulating deep space high code rate signals. Background With the increase of data transmission in deep space communication, the code rate of deep space communication signals is gradually increasing, and a high-order modulation system is gradually started to be used. After the actual signal passes through the transmitting power amplifier, special inherent distortion is generated, which is shown that in one transmission symbol, the I/Q two paths of signals generate inherent intra-symbol dislocation, so that the traditional high-code rate receiving demodulator cannot effectively receive the signals. Aiming at the problems, the traditional deep space high code rate demodulation device respectively adjusts the positions of integral cleaning windows of the two paths of signals of the I/Q by respectively detecting the energy values after the two paths of integral cleaning of the I/Q, so that the effective receiving of the signals is realized. However, the hardware design or processing process of the above device is complex, a higher signal sampling rate is required or an additional digital resampling processing process is required, and a longer detection time is required to complete the sliding detection of the position of the integral cleaning window of the signal, and finally, the effective receiving of the signal is completed. Disclosure of Invention The invention aims to avoid the defects in the background art and provide a deep space high code rate signal receiving and demodulating device. The invention has the characteristics of high implementation reliability, high stability, low implementation complexity and the like. The purpose of the invention is realized in the following way: A deep space high code rate signal receiving demodulation device comprises a digital quadrature down-conversion unit 1, a low-pass filtering unit 2, a digital resampling unit 3, a matched filtering unit 4, a first half symbol shifting unit 5-1, a second half symbol shifting unit 5-2, a third half symbol shifting unit 5-3, a coherent AGC unit 6, a carrier error compensating unit 7, a first extracting unit 8-1, a second extracting unit 8-2, a third extracting unit 8-3, a carrier phase error extracting unit 9, a timing error extracting unit 10, a noncoherent AGC unit 11, a carrier Doppler frequency offset estimating unit 12 and a carrier judging and locking unit 13. Further, the digital quadrature down-conversion unit 1 performs digital down-conversion processing on the intermediate frequency sampling signal, and utilizes the input carrier Doppler frequency offset estimation signal to complete carrier coarse synchronization of the input intermediate frequency sampling signal, and simultaneously generates and outputs two paths of I/Q quadrature baseband signals; The low-pass filtering unit 2 processes the I/Q two-way quadrature baseband signals output by the digital quadrature down-conversion unit 1, and transmits the processed I/Q two-way quadrature baseband signals to the digital resampling unit 3; The digital resampling unit 3 utilizes the input symbol rate setting value and timing error to complete the timing synchronization of the I/Q two-way quadrature baseband signals, and simultaneously generates and outputs 2 times of sampled I/Q two-way quadrature baseband signals; The matched filtering unit 4 carries out filtering processing on 2 times sampled I/Q two-way quadrature baseband signals and outputs the filtered signals, the output I/Q two-way quadrature baseband signals are shunted to generate two groups of I/Q quadrature baseband signals, wherein the first group of I/Q quadrature baseband signals are transmitted to the first half symbol shifting unit 5-1, and the second group of I/Q quadrature baseband signals are transmitted to the incoherent AGC unit 11; The first half symbol shifting unit 5-1 keeps the input I path signal unchanged and outputs the input Q path signal delayed and shifted by one sampling time and outputs the input Q path signal according to the input modulation system setting value, and keeps the I/Q path signal unchanged and outputs the I/Q path signal when the modulation system setting value is OQPSK; The coherent AGC unit 6 receives the signal output by the first half symbol shifting unit 5-1, performs power detection on the two paths of peak point position signals of the I/Q in the received signal, performs power adjustment on the input signal according to the detection value, and outputs the signal; The carrier error compensation unit 7 receives the signals output by the coherent AGC unit 6, carries out carrier phase error compensation processing on the input I/Q quadrature baseband signals according to the input carrier phase err