Search

CN-122028330-A - Manufacturing process of PCB embedded with high-power chip module

CN122028330ACN 122028330 ACN122028330 ACN 122028330ACN-122028330-A

Abstract

The application discloses a manufacturing process of a PCB embedded with a high-power chip module, which relates to the technical field of printed circuit boards and comprises the following steps of providing at least two layers of core boards, and arranging a first caulking groove on the core boards corresponding to the embedded position of the chip module; providing a first prepreg, arranging a second caulking groove on the first prepreg corresponding to the embedding position of the chip module, pre-superposing and fixing the core board and the first prepreg, embedding the chip module into the first caulking groove and the second caulking groove, arranging a leveling layer and the second prepreg, arranging corresponding abdication grooves, sleeving the abdication grooves on a protruding structure of the chip module, superposing a third prepreg on the top of the chip module for lamination, and performing laser blind hole processing and electroplating hole filling above the protruding structure. The application can accurately control the thickness of the dielectric layer at the top of the convex structure.

Inventors

  • Guo Gonghua
  • PAN JIAWEI
  • CHEN AOHUI

Assignees

  • 广东世运电路科技股份有限公司

Dates

Publication Date
20260512
Application Date
20260225

Claims (10)

  1. 1. The manufacturing process of the PCB embedded with the high-power chip module is characterized by comprising the following steps of: Step one, providing at least two layers of core plates (100), and arranging a first caulking groove (110) on the core plates (100) corresponding to the embedding position of a chip module (200); providing a first prepreg (300), and forming a second caulking groove (310) on the first prepreg (300) corresponding to the embedding position of the chip module (200); Step three, pre-laminating and fixing the core plate (100) and the first prepreg (300) to form a laminated structure; Step four, embedding the chip module (200) into the first caulking groove (110) and the second caulking groove (310); Step five, providing a leveling layer (400) and a second prepreg (500), forming corresponding yielding grooves (410) on the leveling layer (400) and the second prepreg (500) according to the raised structures (210) on the top surface of the chip module (200), and sleeving the yielding grooves (410) on the raised structures (210) of the chip module (200); step six, stacking a third prepreg (600) on the top of the chip module (200) for lamination; and step seven, processing laser blind holes and electroplating hole filling above the raised structures (210).
  2. 2. The process of claim 1, wherein in the third step, the pre-lamination is performed by combining fusion and riveting.
  3. 3. The process for manufacturing a PCB embedded with a high power chip module according to claim 1, wherein the chip module (200) is a silicon carbide or gallium nitride power chip packaged by an active metal soldering process.
  4. 4. The process of claim 1, wherein the sum of the thicknesses of the leveling layer (400) and the second prepreg (500) matches the thickness of the bump structure (210).
  5. 5. The process of claim 1, wherein in the sixth step, the thickness of the dielectric layer above the bump structure (210) is controlled to be 140-160 μm.
  6. 6. The process of claim 5, wherein the aspect ratio of the laser blind hole is less than or equal to 1.0.
  7. 7. The process for manufacturing a PCB embedded with a high-power chip module according to claim 6, wherein in the sixth step, two third prepregs (600) are provided, and the thickness of the third prepregs (600) is 75 micrometers.
  8. 8. The process for manufacturing a PCB embedded with a high-power chip module according to claim 1, wherein the first embedded groove (110) and the second embedded groove (310) are combined to form a step surface, and the step surface (111) is used for supporting a ceramic substrate (220) in the chip module (200).
  9. 9. The process for manufacturing a PCB embedded with a high power chip module according to claim 1, wherein the thickness of the chip module (200) matches the sum of the thicknesses of the plurality of core boards (100).
  10. 10. The process for manufacturing a PCB embedded with a high-power chip module according to claim 1, wherein the leveling layer (400) is a copper-free optical plate composed of woven glass fibers and flame-retardant epoxy resin.

Description

Manufacturing process of PCB embedded with high-power chip module Technical Field The application relates to the technical field of printed circuit boards, in particular to a manufacturing process of a PCB embedded with a high-power chip module. Background The embedded high-power chip PCB (printed circuit board) technology realizes high-density integration and performance jump of the electric drive controller by directly embedding power chips such as silicon carbide, gallium nitride and the like into the printed circuit board. The method is currently applied to equipment such as a three-electric system, a server power supply and AI of the new energy automobile. The high power chip module has metal solder boss or coating on the surface after sintering. In the lamination process, the embedded chip boss can change the gumming channel of the PCB lamination, and the stress concentration in the sintering area can also cause excessive or insufficient local pressure, so that the core difficulty of filling the PP (prepreg) in the chip sintering position is concentrated in the control of the filling uniformity. The rigid bumps at the sintering location can impede the lateral flow of PP resin, resulting in uneven distribution of resin "stack-void" around the die periphery, resulting in uneven thickness of the die bump top media. The thickness of the medium at the top of the chip boss is normally designed to be 150um, and the uneven thickness of the medium at the top of the chip boss causes that the subsequent laser blind hole process cannot be performed. Disclosure of Invention The present application aims to solve at least one of the technical problems existing in the prior art. Therefore, the application provides a manufacturing process of the PCB embedded with the high-power chip module, which can accurately control the thickness of the dielectric layer at the top of the chip boss. According to an embodiment of the first aspect of the application, a process for manufacturing a PCB embedded with a high-power chip module comprises the following steps: step one, providing at least two layers of core plates, and arranging a first caulking groove on the core plates corresponding to the embedding position of the chip module; Providing a first prepreg, and forming a second caulking groove on the first prepreg corresponding to the embedded position of the chip module; Step three, pre-laminating and fixing the core plate and the first prepreg to form a laminated structure; step four, embedding the chip module into the first caulking groove and the second caulking groove; step five, providing a leveling layer and a second prepreg, forming corresponding abdication grooves on the leveling layer and the second prepreg according to a protruding structure on the top surface of the chip module, and sleeving the abdication grooves on the protruding structure of the chip module; Step six, stacking a third prepreg on the top of the chip module for lamination; and seventhly, processing laser blind holes and electroplating hole filling above the convex structures. The manufacturing process of the PCB embedded with the high-power chip module has the advantages that the leveling layer is used for replacing a mode of completely relying on flowing glue filling of a plurality of prepregs in a traditional scheme, and the excessive dependence on accurate calculation of the number of prepregs with high glue content and the glue filling area is reduced. The rigid leveling layer can not generate uncontrollable resin flow during lamination, thereby eliminating accumulation and vacancy phenomena caused by blocking of a gumming channel, stably controlling the thickness of a dielectric layer at the top of the convex structure near a design target, and reducing the thickness fluctuation range. Avoiding the influence on the subsequent laser blind holes and electroplating filling holes caused by overlarge thickness. According to some embodiments of the application, in the third step, the pre-lamination is performed by a combination of fusion and riveting. According to some embodiments of the application, the chip module is a silicon carbide or gallium nitride power chip packaged using an active metal brazing process. According to some embodiments of the application, the sum of the thicknesses of the leveling layer and the second prepreg matches the thickness of the bump structure. According to some embodiments of the application, in the sixth step, a thickness of the dielectric layer above the bump structure after lamination is controlled to be in a range of 140 micrometers to 160 micrometers. According to some embodiments of the application, the aspect ratio of the laser blind via is less than or equal to 1.0. According to some embodiments of the application, in the sixth step, the third prepreg is provided with two sheets, and the thickness of the third prepreg is 75 micrometers. According to some embodiments of the application, the first and second