CN-122028431-A - Method for manufacturing semiconductor device

Abstract

A method of manufacturing a semiconductor device is provided that includes forming a first trapped charge layer on a first oxide layer of a first wafer in a batch of wafers by a deposition process, obtaining a first uniformity profile of the first trapped charge layer, determining first feed-forward compensation information for the first wafer based on one of the first uniformity profile and a target uniformity profile, selecting a first process recipe from a plurality of process parameter recipes based on the first feed-forward compensation information, and forming a second oxide layer by a first oxidation process consuming a portion of the first trapped charge layer according to the first process recipe. The invention actively utilizes the data of the previous step to optimize the manufacturing tool of the current batch, thereby avoiding waste and improving efficiency.

Inventors

• SHEN ZHENGYAN
• Lai Zongmu

Assignees

• 力旺电子股份有限公司

Dates

Publication Date

20260512

Application Date

20251105

Priority Date

20241112

Claims (20)

1. 1. A method of manufacturing a semiconductor device, comprising: forming a first charge trapping layer on a first oxide layer of a first wafer in a batch of wafers by a deposition process; obtaining a first uniformity profile of the first trapped-charge layer; determining first feedforward compensation information for the first wafer according to one of the first uniformity profile and the target uniformity profile; Selecting a first process recipe from a plurality of process parameter recipes based on the first feed-forward compensation information, and And forming a second oxide layer by a first oxidation process consuming a portion of the first trapped charge layer according to the first process recipe.
2. 2. The method of claim 1, further comprising: removing the second oxide layer A third oxide layer is formed over the first trapped charge layer.
3. 3. The method of claim 1, wherein determining the first feedforward compensation information comprises: Comparing the thickness of the first trapped charge layer at different locations in the first uniformity profile, and Determining the first feedforward compensation information, the first feedforward compensation information compensating for a location having a plurality of first thicknesses greater than a location having a plurality of second thicknesses, wherein the plurality of first thicknesses is greater than the plurality of second thicknesses.
4. 4. The method of claim 3, wherein the first process recipe comprises at least a plurality of heating temperatures for a plurality of heating elements, Wherein selecting the first process recipe based on the first feedforward compensation information includes: A process recipe is selected that is a heating temperature of the heating element corresponding to the location having the plurality of first thicknesses that is higher than a heating temperature of the heating element corresponding to the location having the plurality of second thicknesses.
5. 5. The method of claim 1, further comprising: The positions of a plurality of heating elements located above the first charge trapping layer are adjusted according to the first uniformity profile.
6. 6. The method of claim 1, wherein determining the first feedforward compensation information comprises: Comparing a plurality of thicknesses of the first trapped charge layer at different locations in the first uniformity profile with a target thickness in the target uniformity profile to produce a plurality of thickness differences, and The first feedforward compensation information is determined, the first feedforward compensation information being greater thermal compensation for locations having a greater thickness difference than for locations having a smaller thickness difference.
7. 7. The method of claim 6, wherein the first wafer has a plurality of heating elements disposed thereon, Wherein selecting the first process recipe based on the first feedforward compensation information includes: a process recipe is selected that is a heating temperature of the heating element corresponding to the location having the greater thickness difference that is higher than a heating temperature of the heating element corresponding to the location having the smaller thickness difference.
8. 8. The method of claim 6, wherein determining the first feedforward compensation information further comprises: Comparing the average thickness of the first trapped charge layer in the first uniformity profile to a target average thickness of the target uniformity profile to produce an average thickness difference, and And determining gas flow compensation in the first feedforward compensation information according to the average thickness difference.
9. 9. The method of claim 8, wherein selecting the first process recipe based on the first feed forward compensation information further comprises: the process recipe is selected to have a gas flow rate and corresponding process time that match the gas flow compensation.
10. 10. The method of claim 1, wherein the first process recipe includes at least one of a heating temperature, a process time, and a gas flow rate of a reaction with the first trapped charge layer of a plurality of heating elements located above the first wafer.
11. 11. The method of claim 1, further comprising: forming a second trapped charge layer on a third oxide layer of a second wafer of the batch of wafers by the deposition process; Obtaining a second uniformity profile of the second trapped-charge layer; determining second feedforward compensation information of the second wafer according to the second uniformity profile and the target uniformity profile; selecting a second process recipe from the plurality of process parameter recipes based on the second feedforward compensation information, and And forming a fourth oxide layer through a second oxidation process consuming part of the second trapped charge layer according to the second process recipe.
12. 12. The method of claim 11, wherein an average thickness of the first uniformity profile and an average thickness of the second uniformity profile are substantially the same as each other and the first process recipe is the same as the second process recipe.
13. 13. The method of claim 11, wherein determining the first feedforward compensation information comprises: comparing the average thickness of the first uniformity profile with a target average thickness of the target uniformity profile to produce a first average thickness difference, and Determining the first feedforward compensation information based on the first average thickness difference, Wherein determining the second feedforward compensation information includes: Comparing the average thickness of the second uniformity profile with the target average thickness to produce a second average thickness difference, and And determining the second feedforward compensation information according to the second average thickness difference.
14. 14. The method of claim 13, wherein when the first average thickness difference is less than the second average thickness difference, Selecting the first process recipe includes selecting a process recipe corresponding to a first reaction rate that consumes the first charge trapping layer, and Selecting the second process recipe includes selecting a process recipe corresponding to a second reaction rate that consumes the second trapped charge layer, Wherein the first reaction rate is slower than the second reaction rate.
15. 15. The method of claim 11, further comprising: When the thickness of the first trapped-charge layer at the same location on the first wafer is different from the thickness of the second trapped-charge layer at the same location on the second wafer, And adjusting a plurality of process parameters for forming the fourth oxide layer from parameters in the first process recipe to parameters in the second process recipe.
16. 16. The method of claim 11, wherein a thickness of the first trapped charge layer remainder and a thickness of the second trapped charge layer remainder are the same as each other.
17. 17. A method of manufacturing a semiconductor device, comprising: Obtaining a plurality of uniformity profiles of a plurality of deposition layers in a batch of wafers; determining feedforward compensation information based on a plurality of thickness map profiles generated by comparing the plurality of uniformity profiles with a target uniformity profile, and Based on the feedforward compensation information, a plurality of process parameters of an oxidation process are adjusted to consume portions of the plurality of deposited layers in the batch of wafers.
18. 18. The method of claim 17, wherein comparing the plurality of uniformity profiles to the target uniformity profile comprises: the plurality of average thicknesses of the plurality of deposited layers in the plurality of wafers are compared to a target thickness to produce a plurality of thickness differences in the plurality of thickness map profiles.
19. 19. The method of claim 17, wherein comparing the plurality of uniformity profiles to the target uniformity profile comprises: A plurality of thicknesses of the plurality of deposition layers at different locations for each of the plurality of uniformity profiles is compared to a target thickness in the target uniformity profile to generate a corresponding one of the plurality of thickness map profiles.
20. 20. The method of claim 17, wherein adjusting the plurality of process parameters in the oxidation process comprises: And adjusting a plurality of process parameters according to a process recipe matched with the feedforward compensation information selected from the plurality of process parameter recipes.

Description

Method for manufacturing semiconductor device Technical Field The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a semiconductor device using in-situ vapor generation in combination with tuning of a heating element to precisely oxidize a deposited layer to achieve a uniform thickness. Background Oxide-nitride-oxide (ONO) stacks are effective as a charge trapping layer in silicon-oxide-nitride-oxide-silicon (SONOS) transistors or as an isolation layer between gates in split gate flash memories, but the quality of charge trapping in SONOS structures is largely dependent on the silicon nitride (SiN) film. This presents a significant process challenge due to non-uniformity of the stoichiometry and non-optimized thickness distribution. Disclosure of Invention An embodiment of the present invention provides a method of manufacturing a semiconductor device, comprising forming a first trapped charge layer on a first oxide layer of a first wafer in a batch of wafers by a deposition process, obtaining a first uniformity profile of the first trapped charge layer, determining first feedforward compensation information of the first wafer according to one of the first uniformity profile and a target uniformity profile, selecting a first process recipe from a plurality of process parameter recipes based on the first feedforward compensation information, and forming a second oxide layer by a first oxidation process consuming a portion of the first trapped charge layer according to the first process recipe. In some embodiments, the method further includes removing the second oxide layer and forming a third oxide layer over the first charge trapping layer. In some embodiments, determining the first feedforward compensation information includes comparing thicknesses of the first captured charge layer at different locations in the first uniformity profile and determining the first feedforward compensation information that compensates more for locations having a plurality of first thicknesses than for locations having a plurality of second thicknesses, wherein the plurality of first thicknesses is greater than the plurality of second thicknesses. In some embodiments, the first process recipe includes at least a plurality of heating temperatures for a plurality of heating elements. Selecting the first process recipe based on the first feed forward compensation information includes selecting a process recipe that is a heating temperature of a heating element corresponding to a location having the plurality of first thicknesses that is higher than a heating temperature of a heating element corresponding to a location having the plurality of second thicknesses. In some embodiments, the method further includes adjusting a position of a plurality of heating elements located above the first trapped charge layer according to the first uniformity profile. In some embodiments, determining the first feedforward compensation information includes comparing a plurality of thicknesses of the first captured charge layer at different locations in the first uniformity profile to a target thickness in the target uniformity profile to produce a plurality of thickness differences, and determining the first feedforward compensation information to be more thermally compensated for locations with greater thickness differences than for locations with lesser thickness differences. In some embodiments, a plurality of heating elements are disposed above the first wafer. Selecting the first process recipe based on the first feed-forward compensation information includes selecting a process recipe that is a heating temperature of a heating element corresponding to a location having a greater thickness difference than a heating temperature of a heating element corresponding to a location having a smaller thickness difference. In some embodiments, determining the first feedforward compensation information further includes comparing an average thickness of the first trapped charge layer in the first uniformity profile to a target average thickness of the target uniformity profile to produce an average thickness difference, and determining a gas flow compensation in the first feedforward compensation information based on the average thickness difference. In some embodiments, selecting the first process recipe based on the first feed forward compensation information further includes selecting the process recipe having a gas flow rate and a corresponding process time that match the gas flow compensation. In some embodiments, the first process recipe includes at least one of a heating temperature, a process time, and a gas flow rate of a plurality of heating elements located above the first wafer that react with the first charge trapping layer. In some embodiments, the method further includes forming a second trapped charge layer on a third oxide layer of a second wafer in the batch