CN-122028445-A - Semiconductor structure and manufacturing method thereof

Abstract

The invention provides a semiconductor structure and a manufacturing method thereof. The structure comprises a first contact hole and a second contact hole with different apertures in a dielectric layer, wherein the difference of depth-to-width ratios caused by the apertures is utilized, an inclination angle ion implantation process is adopted, so that impurity ions are implanted only to the bottom of the first contact hole with a large size to form a lightly doped contact region, and the bottom of the second contact hole with a small size is shielded by a side wall to form an implantation region. After the conductive plugs are filled, schottky contact is formed at the first contact holes, and ohmic contact is formed at the second contact holes. The invention realizes self-aligned selective injection by utilizing the shadow effect of the contact hole without additionally adding a photoetching mask, effectively solves the problems of difficult Schottky contact manufacture and unstable parameters in the low thermal budget process, reduces the cost and improves the reliability of the device.

Inventors

• Lang Chenzhi
• TANG ZHENG
• FANG MINGXU
• WANG LI
• CHEN HUALUN

Assignees

• 华虹半导体(无锡)有限公司
• 华虹半导体制造(无锡)有限公司
• 上海华虹宏力半导体制造有限公司

Dates

Publication Date

20260512

Application Date

20260129

Claims (20)

1. 1. A semiconductor structure, comprising: A semiconductor substrate, on which an epitaxial layer is provided; The dielectric layer is positioned on the surface of the epitaxial layer; the contact holes penetrate through the dielectric layer and expose part of the surface of the epitaxial layer, and comprise a first contact hole with larger aperture size and a second contact hole with smaller aperture size, wherein the aspect ratio of the first contact hole is smaller than that of the second contact hole; The lightly doped contact region is only positioned on the surface of the epitaxial layer at the bottom of the first contact hole, and the lightly doped contact region is not formed on the surface of the epitaxial layer at the bottom of the second contact hole; a conductive plug filled in the first contact hole and the second contact hole; and the conductive plug in the first contact hole and the lightly doped contact region form a Schottky contact.
2. 2. The semiconductor structure of claim 1, wherein the semiconductor substrate has a first conductivity type, a buried layer of a second conductivity type is disposed in the semiconductor substrate, and the epitaxial layer is located on a surface of the semiconductor substrate and has the first conductivity type.
3. 3. The semiconductor structure of claim 2, wherein a buried layer of a first conductivity type is further disposed in the semiconductor substrate, the buried layer of the first conductivity type being adjacent to the buried layer of the second conductivity type to form a bottom isolation structure.
4. 4. The semiconductor structure of claim 1, wherein the surface of the epitaxial layer is provided with shallow trench isolation structures defining an active region.
5. 5. The semiconductor structure of claim 4, wherein a well region of the second conductivity type and a well region of the first conductivity type are provided in the epitaxial layer within the active region.
6. 6. The semiconductor structure of claim 5, wherein the epitaxial layer has a surface provided with heavily doped regions of the second conductivity type and heavily doped regions of the first conductivity type.
7. 7. The semiconductor structure of claim 6, wherein the surface of the epitaxial layer is further provided with a silicide layer, and the dielectric layer is over the silicide layer.
8. 8. The semiconductor structure of claim 1, wherein the first contact hole has a pore size b and the second contact hole has a pore size a, wherein b is greater than a.
9. 9. The semiconductor structure of claim 1, wherein the cross-sectional shape of the first contact hole comprises a polygonal shape, a circular shape, an elliptical shape, or a bar shape in a direction parallel to the surface of the semiconductor substrate.
10. 10. The semiconductor structure of claim 9, wherein the polygon is selected from the group consisting of a hexagon, a square, a rectangle, and an octagon.
11. 11. The semiconductor structure of claim 1, wherein the plurality of first contact holes are arranged in a predetermined array.
12. 12. The semiconductor structure of claim 11, wherein the predetermined array arrangement is selected from the group consisting of a rectangular array arrangement, a honeycomb array arrangement, and a concentric circular array arrangement.
13. 13. The semiconductor structure of claim 1, wherein the epitaxial layer has a first conductivity type and the lightly doped contact region has a second conductivity type.
14. 14. The semiconductor structure of claim 2, 3, 5, 6 or 13, wherein the first conductivity type is P-type and the second conductivity type is N-type, or wherein the first conductivity type is N-type and the second conductivity type is P-type.
15. 15. A method of fabricating a semiconductor structure, comprising: Providing a semiconductor substrate with a formed device structure and a dielectric layer, and etching in the dielectric layer to form a plurality of contact holes exposing the surface of the semiconductor substrate, wherein the contact holes comprise a first contact hole with larger aperture size and a second contact hole with smaller aperture size; performing ion implantation on the semiconductor substrate by adopting an inclined angle, and implanting impurity ions to the surface of the semiconductor substrate at the bottom of the first contact hole to form a lightly doped contact region by utilizing the depth-to-width ratio difference of the first contact hole and the second contact hole, wherein the impurity ions are shielded by the side wall of the second contact hole and cannot reach the bottom of the second contact hole; And thirdly, filling conductive materials in the first contact hole and the second contact hole, so that the conductive materials in the first contact hole are contacted with the lightly doped contact region to form the Schottky diode.
16. 16. The method of manufacturing a semiconductor structure according to claim 15, wherein in the first step, the semiconductor substrate having the device structure and the dielectric layer formed thereon is provided, the method comprises providing a semiconductor substrate having a first conductivity type, forming a buried layer of a second conductivity type and a buried layer of the first conductivity type in the semiconductor substrate, and growing an epitaxial layer of the first conductivity type on a surface of the semiconductor substrate, forming a shallow trench isolation structure in the epitaxial layer, forming a well region of the second conductivity type and a well region of the first conductivity type in the epitaxial layer of the first conductivity type, defining a heavily doped region of the second conductivity type and a heavily doped region of the first conductivity type on a surface of the epitaxial layer of the first conductivity type, forming a silicide on a surface of the structure after the above steps are completed, and depositing the dielectric layer.
17. 17. The method of manufacturing a semiconductor structure according to claim 16, wherein in the first step, the method of forming the buried layer of the second conductivity type and the buried layer of the first conductivity type includes forming a photoresist pattern on a surface of the semiconductor substrate, and ion implanting to define the buried layer of the second conductivity type and the buried layer of the first conductivity type through openings of the photoresist pattern, respectively.
18. 18. The method of manufacturing a semiconductor structure according to claim 16, wherein in the first step, the method of forming the shallow trench isolation structure comprises forming a trench by etching the epitaxial layer, depositing a dielectric material to fill the trench, and performing a planarization process.
19. 19. The method of manufacturing a semiconductor structure according to claim 16, wherein in the first step, the method of forming silicide includes defining a silicide blocking layer, depositing a metal layer, and annealing to form silicide.
20. 20. The method of manufacturing a semiconductor structure according to claim 15, wherein in the second step, the impurity ions have a second conductivity type, and the lightly doped contact region of the second conductivity type is formed on the surface of the epitaxial layer of the first conductivity type.

Description

Semiconductor structure and manufacturing method thereof Technical Field The present invention relates to the field of integrated circuit fabrication, and more particularly, to a semiconductor structure and a method for fabricating the same, and more particularly, to a schottky diode fabrication method suitable for BCD (Bipolar-CMOS-DMOS) process. Background Schottky diodes (Schottky diodes) are widely used in high frequency circuits and power management chips due to their low forward voltage drop and fast switching speed characteristics. In a typical 6-inch or 8-inch wafer process, due to the large overall thermal budget, the impurity regions with low doping concentration are typically diffused to the semiconductor surface by multiple high-temperature diffusions after deep well (e.g., DNW) implantation, thereby forming schottky contacts with subsequently formed metals. This method of forming contact regions using long-distance diffusion is mature and effective in conventional large-scale node processes. However, as process technology shifts to 12 inch wafers, the thermal budget during processing is significantly reduced compared to 8 inch wafers in order to guarantee advanced node device performance and control short channel effects. At low thermal budget, an effective schottky contact cannot be formed by long-distance diffusion of the deep well to the surface. To address this problem, practitioners in the prior art propose to use Counter Doping (Counter Doping) between the N-drift region (N-drift) and the P-drift region (P-drift), and rely on the net concentration region after Doping cancellation to ultimately form a schottky diode with the metal. However, the device manufactured by the doping offset mechanism has extremely narrow process window and unstable performance, so that the forward on Voltage (VF) and Breakdown Voltage (BV) between wafers have great fluctuation and the yield is difficult to control. Therefore, there is a need for a schottky diode structure and method for fabricating the same that is suitable for low thermal budget processes (e.g., advanced BCD processes), and that can precisely control the doping concentration, ensure device uniformity, and do not require significant increases in the cost of the mask. Disclosure of Invention The invention aims to solve the technical problems that in the existing semiconductor process (particularly the low thermal budget process of a 12-inch wafer and the like), effective Schottky contact is difficult to form by deep well diffusion, the problem of large fluctuation of device parameters and poor stability exists by means of the counter doping of a drift region, and the process cost and alignment error are increased by adopting an additional photomask to define an injection region. In order to solve the above-mentioned problems, the present invention provides a semiconductor structure for manufacturing a schottky diode by utilizing the contact hole aspect ratio difference and the inclined implantation and a manufacturing method thereof. The invention provides a semiconductor structure, comprising: A semiconductor substrate, on which an epitaxial layer is provided; The dielectric layer is positioned on the surface of the epitaxial layer; the contact holes penetrate through the dielectric layer and expose part of the surface of the epitaxial layer, and comprise a first contact hole with larger aperture size and a second contact hole with smaller aperture size, wherein the aspect ratio of the first contact hole is smaller than that of the second contact hole; The lightly doped contact region is only positioned on the surface of the epitaxial layer at the bottom of the first contact hole, and the lightly doped contact region is not formed on the surface of the epitaxial layer at the bottom of the second contact hole; a conductive plug filled in the first contact hole and the second contact hole; and the conductive plug in the first contact hole and the lightly doped contact region form a Schottky contact. Preferably, the semiconductor substrate has a first conductivity type, a buried layer of a second conductivity type is arranged in the semiconductor substrate, and the epitaxial layer is positioned on the surface of the semiconductor substrate and has the first conductivity type. Preferably, the semiconductor substrate is further provided with a buried layer of a first conductivity type, and the buried layer of the first conductivity type is adjacent to the buried layer of the second conductivity type to form a bottom isolation structure. Preferably, a shallow trench isolation structure is arranged on the surface of the epitaxial layer, and the shallow trench isolation structure is used for defining the active region. Preferably, a second conductivity type well region and a first conductivity type well region are provided in the epitaxial layer within the active region. Preferably, the surface of the epitaxial layer is provided with a heavily doped reg