CN-122028454-A - Method for forming small-size semiconductor device structure

CN122028454ACN 122028454 ACN122028454 ACN 122028454ACN-122028454-A

Abstract

The invention discloses a method for forming a small-size semiconductor device structure, which comprises the steps of forming a grid electrode on a semiconductor substrate or an epitaxial layer, depositing and etching a dielectric layer on two sides of the grid electrode to form a primary side wall, directly carrying out ion implantation of an LDD injection region on the device without adjusting the morphology of the LDD injection region after the primary side wall is formed, carrying out a primary side wall widening process on the device with the morphology of the LDD injection region, additionally growing a primary dielectric layer and etching, widening the primary side wall, carrying out ion implantation of the LDD injection region, continuing to grow the dielectric layer and etching after the injection of the LDD injection region is completed, forming a secondary side wall, carrying out ion implantation of a source drain region, and forming a source drain region, wherein the secondary side wall is required to reduce the deposition thickness, namely the thickness of the secondary side wall. The forming method of the invention can restrain the short channel effect without changing the size of the device.

Inventors

HE ZHENGLIN
GUO ZHENQIANG
HUANG PENG
WANG HAN
XIAO JINGCAI

Assignees

华虹半导体(无锡)有限公司

Dates

Publication Date: 20260512
Application Date: 20260129

Claims (8)

1. A method for forming a small-size semiconductor device structure, wherein the small-size semiconductor structure has a device which needs to adjust the shape of an LDD injection region and a device which does not need to adjust the shape of the LDD injection region, and is characterized in that: After a grid electrode is formed on a semiconductor substrate or an epitaxial layer, dielectric layer deposition and etching are carried out on two sides of the grid electrode, so that a primary side wall is formed; For the device needing to adjust the shape of the LDD injection region, a primary side wall widening process is carried out, a primary dielectric layer is additionally grown and etched, the primary side wall is widened, and then the ion injection of the LDD injection region is carried out; after the injection of the LDD injection region is completed, continuing to grow a dielectric layer and etching to form a secondary side wall, and then carrying out ion injection of the source drain region to form the source drain region; The thickness of the secondary side wall is reduced by reducing the deposition thickness.
2. The method of forming a small-sized semiconductor device structure according to claim 1, wherein the semiconductor substrate is a silicon substrate or a compound semiconductor.
3. The method of claim 1, wherein the LDD implantation is performed before the process of widening the spacer for EHVT devices or SRAM devices, and the LDD implantation is performed after the process of widening the spacer for RVT devices.
4. The method of forming a small scale semiconductor device structure as claimed in claim 3, wherein the EHVT device or the SRAM device is a device without adjusting the LDD injection region, the RVT device is a device with the LDD injection region, and the effective channel length of the device is increased after the LDD injection region is adjusted.
5. The method of claim 1, wherein the one-time sidewall widening process widens a thickness of 10-20A.
6. The method of claim 5, wherein the secondary sidewall is deposited with a thickness 15-30 a less than the normal process value.
7. The method for forming a small-scale semiconductor device structure of claim 1, wherein: the primary side wall, the primary side wall widening process and the secondary side wall, the deposited dielectric layer is silicon nitride.
8. The method of forming a small-scale semiconductor device structure as claimed in claim 1, wherein said method is applicable to various types of MOSFET devices.

Description

Method for forming small-size semiconductor device structure Technical Field The invention relates to the field of semiconductor device manufacturing processes, in particular to a method for forming a small-size semiconductor device structure. Background As process capability advances, the area of the semiconductor device is becoming smaller and there is a severe short channel effect when the critical dimensions are undersized. This is because the overlap (overlap) region between the Lightly Doped Drain (LDD) and the Gate is unchanged and Poly length is gradually reduced, the effective channel length is too short, the Gate control capability is reduced to cause Drain Induced Barrier Lowing (DIBL), and short channel effects, even source drain punch-through, exist. As shown in fig. 1, the two sides of the gate are sidewalls, the LDD region is in the substrate under the sidewalls, and the LDD region slightly extends to the lower side of the gate to form a section of overlap region with the gate. When the channel is reduced to a certain degree, the duty ratio of the source drain depletion region in the whole channel is increased, so that the threshold voltage of the MOSFET is reduced, and the grid control capability is reduced and the electric leakage is increased. In order to solve the problems, the existing improvement mode is to use a High-K metal oxide material as a gate dielectric layer so as to enhance the gate control capability of the MOSFET and inhibit the short channel effect. However, the process is complex, most of the gate oxide layers of the mature nodes are formed into silicon oxide layers by a thermal oxidation process, the processes are completely different, a new machine, a new material and a new process are needed to support, and the cost is high. Disclosure of Invention The invention aims to provide a method for forming a small-size semiconductor device structure. In order to solve the above problems, the present invention provides a method for forming a small-sized semiconductor device structure, comprising: a method for forming small-size semiconductor device structure includes that the small-size semiconductor structure has a device which needs to adjust the shape of LDD injection region and a device which does not need to adjust the shape of LDD injection region; After a grid electrode is formed on a semiconductor substrate or an epitaxial layer, dielectric layer deposition and etching are carried out on two sides of the grid electrode, so that a primary side wall is formed; For the device needing to adjust the shape of the LDD injection region, a primary side wall widening process is carried out, a primary dielectric layer is additionally grown and etched, the primary side wall is widened, and then the ion injection of the LDD injection region is carried out; after the injection of the LDD injection region is completed, continuing to grow a dielectric layer and etching to form a secondary side wall, and then carrying out ion injection of the source drain region to form the source drain region; The thickness of the secondary side wall is reduced by reducing the deposition thickness. Further, the semiconductor substrate is a silicon substrate or a compound semiconductor. Further, for EHVT devices or SRAM devices, the LDD implantation is completed before the process of widening the side wall once, and for RVT devices, the LDD implantation is completed after the process of widening the side wall once. Further, the EHVT device or the SRAM device is a device without adjusting the shape of the LDD injection region, the RVT device is a device with the shape of the LDD injection region, and the effective channel length of the device is increased after the LDD injection region is adjusted. Further, in the primary side wall widening process, the widened thickness is 10-20A. Further, the thickness of the secondary side wall is reduced by 15-30A compared with the normal process value during deposition. Further, the primary side wall widening process and the secondary side wall, the deposited dielectric layer is silicon nitride. Further, the formation method is applicable to various types of MOSFET devices. The invention provides a method for forming a small-size semiconductor device structure, which is a process method for increasing an effective channel of a device needing to adjust LDD injection morphology by adding one-time side wall dielectric layer deposition (forming a wider side wall WIDER SPACER) after forming a polysilicon gate and reducing the thickness of a second side wall deposition in a subsequent process, namely, increasing the thickness of a first side wall by two-time deposition, and reducing the thickness of a second side wall by reducing the growing time when the second side wall is formed, so that the effect of inhibiting a short channel effect under the condition of not changing the size of the device by only changing the LDD injection region without changing the position of a s