CN-122028468-A - Semiconductor device, method of manufacturing the same, power module, power conversion circuit, and vehicle

CN122028468ACN 122028468 ACN122028468 ACN 122028468ACN-122028468-A

Abstract

The application discloses a semiconductor device, a manufacturing method thereof, a power module, a power conversion circuit and a vehicle. The semiconductor device comprises at least one device cell which is arranged in an array mode, the device cell comprises a semiconductor body and comprises a first surface and a second surface which are oppositely arranged, orthographic projection of a first area on the first surface is located in orthographic projection of a well area on the first surface and is hexagonal, orthographic projection of the well area on the first surface is provided with a first edge, a second edge and a third edge which are sequentially connected, the second edge and the third edge form sharp angles, the second area is located at least on one side, far away from the well area, of the first edge, doping concentration of one side, far away from the well area, of the second edge is smaller than that of the second area, and doping concentration of one side, far away from the well area, of the third edge is smaller than that of the second area. The embodiment of the application can improve the breakdown voltage of the silicon carbide device with the hexagonal cell structure and improve the pressure resistance of the silicon carbide device.

Inventors

Xu Kunhui
WANG DONGDONG
ZHAO YONG
ZHANG SHUYU
LI QIAN

Assignees

长飞先进半导体(武汉)有限公司

Dates

Publication Date: 20260512
Application Date: 20260209

Claims (13)

1. The semiconductor device is characterized by comprising at least one device cell, wherein at least one device cell is arranged in an array; The device cell comprises: The semiconductor body is provided with a first conductive type and comprises a first surface and a second surface which are oppositely arranged, the semiconductor body further comprises a well region, a first region and a second region, the first region is provided with the first conductive type and is positioned on the first surface, the well region is provided with the second conductive type and is positioned on the first surface, the orthographic projection of the first region on the first surface is positioned inside the orthographic projection of the well region on the first surface and is in a hexagon shape, the orthographic projection of the well region on the first surface is provided with a first edge, a second edge and a third edge which are sequentially connected, and the second edge and the third edge form a sharp angle, the second region is provided with the first conductive type and is positioned on at least one side of the first edge away from the well region, the doping concentration of the region on one side of the second edge away from the well region is smaller than that of the second region, and the doping concentration of the region on one side of the third edge away from the well region is smaller than that of the second region; an insulating layer located on the first surface; a gate electrode located on a side of the insulating layer away from the semiconductor body, the insulating layer being for insulating the semiconductor body and the gate electrode; a source electrode positioned on one side of the grid electrode far away from the semiconductor body; And the drain electrode is positioned on the second surface.
2. The semiconductor device of claim 1, wherein the second region is disposed on a side of the first edge remote from the well region.
3. The semiconductor device of claim 1, wherein the device cell includes two of the first edges disposed opposite each other, two of the second edges disposed opposite each other, and two of the third edges disposed opposite each other; the length of the second edge is smaller than the length of the first edge, and the length of the third edge is smaller than the length of the first edge.
4. The semiconductor device of claim 3, wherein the second region is disposed on a side of the first edge remote from the well region, And the second area is respectively arranged at one side of the parts, far away from the sharp angles, of the second edge and the third edge, far away from the well region.
5. The semiconductor device according to claim 2 or 4, wherein a region on a side away from the well region at a junction of the second edge and the third edge is provided as the first conductivity type, and a doping concentration of the region on the side away from the well region at the junction of the second edge and the third edge is smaller than that of the second region; or a region of the junction of the second edge and the third edge, which is far from the side of the well region, is set to be of the second conductivity type.
6. The semiconductor device of claim 1, wherein the semiconductor body further comprises a third region of the second conductivity type disposed at the first surface, an orthographic projection of the third region at the first surface being located inside an orthographic projection of the first region at the first surface, an ion concentration of the third region being greater than an ion concentration of the well region.
7. The semiconductor device of claim 6, further comprising a dielectric layer; the dielectric layer is positioned on one side of the grid electrode far away from the semiconductor body and is provided with a source electrode connecting hole, and the orthographic projection of the source electrode connecting hole on the first surface is at least partially overlapped with the orthographic projection of the third area on the first surface; the source electrode contacts the third region through the source connection hole.
8. A method of manufacturing a semiconductor device, comprising: providing a semiconductor body, wherein the semiconductor body is provided with a first conductive type and comprises a first surface and a second surface which are oppositely arranged; forming a well region and a first region in the semiconductor body, wherein the first region is of the first conductivity type and is positioned on the first surface, the well region is of the second conductivity type and is positioned on the first surface, the orthographic projection of the first region on the first surface is positioned in the orthographic projection of the well region on the first surface and is hexagonal, and the orthographic projection of the well region on the first surface is provided with a first edge, a second edge and a third edge which are sequentially connected, and the second edge and the third edge form sharp angles; Forming a second region in the semiconductor body, wherein the second region is of a first conductivity type and is at least positioned on one side of the first edge away from the well region, the doping concentration of the region of the second edge away from the well region is smaller than that of the second region, and the doping concentration of the region of the third edge away from the well region is smaller than that of the second region; forming an insulating layer on the first surface; forming a gate electrode on a side of the insulating layer away from the semiconductor body, the insulating layer being used for insulating the semiconductor body and the gate electrode; Forming a source electrode on one side of the grid electrode far away from the semiconductor body; And forming a drain electrode on the second surface.
9. The method of manufacturing a semiconductor device according to claim 8, wherein the forming a second region in the semiconductor body comprises: performing ion implantation on the region between the first edges of the well region in the semiconductor body by adopting a first mask plate to form the second region; Or a second mask plate is adopted to carry out ion implantation on the region, far away from the well region, of the first edge in the semiconductor body and one side, far away from the well region, of the part, far away from the sharp angle, of the second edge and the third edge, so as to form the second region.
10. The method of manufacturing a semiconductor device according to claim 9, wherein before the semiconductor body forms the second region, further comprising: forming a third region on the semiconductor body, wherein the third region is of a second conductivity type and is positioned on the first surface, the orthographic projection of the third region on the first surface is positioned inside the orthographic projection of the first region on the first surface, and the ion concentration of the third region is larger than that of the well region; The method further comprises, before forming a source electrode on a side of the gate away from the semiconductor body: and forming a dielectric layer on one side of the grid electrode far away from the semiconductor body, wherein the dielectric layer is provided with a source electrode connecting hole, and the orthographic projection of the source electrode connecting hole on the first surface overlaps with the orthographic projection part of the third area on the first surface so that a source electrode is contacted with the third area through the source electrode connecting hole.
11. A power module comprising a substrate and the semiconductor device of any one of claims 1-7, the substrate being for carrying the semiconductor device.
12. A power conversion circuit for one or more of current conversion, voltage conversion, and power factor correction; the power conversion circuit comprising a circuit board and at least one semiconductor device according to any one of claims 1-7, the semiconductor device being electrically connected to the circuit board.
13. A vehicle comprising a load and the power conversion circuit according to claim 12, wherein the power conversion circuit is configured to convert alternating current into direct current, alternating current into alternating current, direct current into direct current, or direct current into alternating current, and then input the alternating current into the load.

Description

Semiconductor device, method of manufacturing the same, power module, power conversion circuit, and vehicle Technical Field The present application relates to the field of semiconductor technologies, and in particular, to a semiconductor device, a method for manufacturing the semiconductor device, a power module, a power conversion circuit, and a vehicle. Background The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) of the third generation wide bandgap semiconductor such as silicon carbide or gallium nitride has the characteristics of large critical breakdown field strength, high thermal conductivity, large bandgap, high electron saturation drift speed and the like, so that the third generation wide bandgap semiconductor material such as silicon carbide or gallium nitride becomes a research hot spot of a power semiconductor device, and in high-power application occasions such as high-speed railways, hybrid electric vehicles, intelligent high-voltage direct current transmission and the like, the silicon carbide device is endowed with high expectations. Silicon carbide devices have a variety of cell designs in which the hexagonal cell structure has a greater channel density, a greater overcurrent capability, and a lower on-resistance, but the hexagonal cell structure has a poorer withstand voltage capability. Disclosure of Invention The application provides a semiconductor device, a manufacturing method, a power module, a power conversion circuit and a vehicle, which are used for improving the breakdown voltage of a silicon carbide device with a hexagonal cell structure, so that the pressure resistance of the silicon carbide device is improved. In a first aspect, a semiconductor device is provided, including at least one device cell, at least one of the device cells being arranged in an array; The device cell comprises: The semiconductor body is provided with a first conductive type and comprises a first surface and a second surface which are oppositely arranged, the semiconductor body further comprises a well region, a first region and a second region, the first region is provided with the first conductive type and is positioned on the first surface, the well region is provided with the second conductive type and is positioned on the first surface, the orthographic projection of the first region on the first surface is positioned inside the orthographic projection of the well region on the first surface and is in a hexagon shape, the orthographic projection of the well region on the first surface is provided with a first edge, a second edge and a third edge which are sequentially connected, and the second edge and the third edge form a sharp angle, the second region is provided with the first conductive type and is positioned on at least one side of the first edge away from the well region, the doping concentration of the region on one side of the second edge away from the well region is smaller than that of the second region, and the doping concentration of the region on one side of the third edge away from the well region is smaller than that of the second region; an insulating layer located on the first surface; a gate electrode located on a side of the insulating layer away from the semiconductor body, the insulating layer being for insulating the semiconductor body and the gate electrode; a source electrode positioned on one side of the grid electrode far away from the semiconductor body; And the drain electrode is positioned on the second surface. Optionally, the second region is disposed on a side of the first edge away from the well region. Optionally, the device cell includes two first edges disposed opposite to each other, two second edges disposed opposite to each other, and two third edges disposed opposite to each other; the length of the second edge is smaller than the length of the first edge, and the length of the third edge is smaller than the length of the first edge. Optionally, the second region is disposed on a side of the first edge away from the well region, And the second area is respectively arranged at one side of the parts, far away from the sharp angles, of the second edge and the third edge, far away from the well region. Optionally, a region on a side away from the well region at a junction of the second edge and the third edge is set to be of the first conductivity type, and a doping concentration of the region on the side away from the well region at the junction of the second edge and the third edge is smaller than that of the second region; or a region of the junction of the second edge and the third edge, which is far from the side of the well region, is set to be of the second conductivity type. Optionally, the semiconductor body further comprises a third region, wherein the third region is of the second conductivity type and is located on the first surface, the orthographic projection of the third region on the first surface is located inside the orthographic