CN-122028474-A - Quick recovery MOSFET structure and manufacturing method thereof

CN122028474ACN 122028474 ACN122028474 ACN 122028474ACN-122028474-A

Abstract

A fast recovery MOSFET structure and a manufacturing method thereof belong to the technical field of power devices and comprise a substrate, an epitaxial layer, at least two body regions, an accumulation type channel, a grid structure, a source medium layer and a source electrode, wherein the epitaxial layer is arranged on the substrate, the epitaxial layer is provided with at least two body regions, a partition structure is formed between the two body regions, the body region is provided with an active region and the accumulation type channel, the accumulation type channel is located on one side close to the partition structure, the grid structure is arranged on the epitaxial layer, at least two source medium layers are arranged on the partition structure and cover the accumulation type channel and the partition structure, the source medium layer is located between the two grid structures, and the source electrode is arranged on the source region and the source medium layer. According to the application, the partition structure, the accumulation type channel and the source medium layer are arranged, so that when the voltage of the source electrode minus the voltage of the drain electrode is larger than a threshold value, the accumulation type channel is started, thereby inhibiting the parasitic PN diode from being started, ensuring high voltage resistance and high frequency performance, and simultaneously having high reliability and low loss.

Inventors

WANG HANGYU
SHENG KUANG
WANG HAOYU
CHENG HAOYUAN
ZHANG CHI
WANG HAN

Assignees

浙江大学

Dates

Publication Date: 20260512
Application Date: 20251231

Claims (10)

1. A fast recovery MOSFET structure comprising: A substrate; An epitaxial layer disposed on the substrate; at least two body regions are arranged in the epitaxial layer, and a partition structure is formed between the two body regions; an active region and an accumulation-type channel are arranged in the body region, and the accumulation-type channel is positioned at one side close to the partition structure; the grid structure is arranged on the epitaxial layer and is provided with at least two grid structures; The source medium layer is arranged on the partition structure and covers the accumulation type channel and the partition structure; and the source electrode is arranged on the source region and the source dielectric layer.
2. The fast recovery MOSFET structure of claim 1 wherein said accumulation channel is in a depletion state when a source voltage is less than a drain voltage and is in an on state when a source voltage minus a drain voltage is greater than a threshold.
3. The fast recovery MOSFET structure of claim 2, wherein the epitaxial layer is of a first conductivity type, the body is of a second conductivity type, the source is of the first conductivity type, and the accumulation channel is of the first conductivity type.
4. A fast recovery MOSFET structure according to any one of claims 1-3, wherein said accumulation channel is fully depleted by the body region at Vds greater than 0; the thickness and doping concentration of the accumulation channel satisfy the following formula: ; Wherein H c is the thickness of the accumulation type channel, epsilon s is the dielectric constant of the semiconductor, N b is the doping concentration of the body region, N c is the doping concentration of the accumulation type channel, V bi is the built-in potential of the PN junction of the semiconductor, and q is the electron charge quantity.
5. The fast recovery MOSFET structure of claim 4, wherein a thickness of the source dielectric layer is between 30nm and 80nm, or the source dielectric layer is the same as the gate dielectric layer.
6. The fast recovery MOSFET structure according to any one of claims 1-3 or 5, further comprising: The grid electrode structure comprises a grid electrode structure, a grid electrode isolation layer, a first electrode and a second electrode, wherein the grid electrode structure is provided with a grid electrode, and the grid electrode structure is provided with a grid electrode structure; and a drain electrode disposed on the back surface of the substrate.
7. A method of fabricating a fast recovery MOSFET structure comprising the steps of: Providing a substrate, wherein the substrate comprises a substrate and an epitaxial layer arranged on the substrate, and the epitaxial layer is of a first conductivity type; constructing at least two body regions of a second conductivity type in the epitaxial layer and forming a partition structure; constructing a source region of a first conductivity type in the body region; Constructing an accumulation type channel close to the partition structure in the body region, wherein the accumulation type channel is of a first conductivity type; and constructing a grid structure and a source medium layer covering the accumulation type channel and the partition structure on the epitaxial layer.
8. The method of claim 7, wherein the accumulation channel is formed by ion implantation, and wherein the total ion implantation dose is as follows: ; Wherein D c is the total implant dose, H c is the thickness of the accumulation channel, N b is the body doping concentration, and N c is the accumulation channel doping concentration.
9. The method of fabricating a fast recovery MOSFET structure according to claim 7 or 8, wherein said constructing a gate structure and a source dielectric layer covering the accumulation channel and the partition structure on the epitaxial layer comprises the steps of: constructing a dielectric layer and a gate material on the epitaxial layer; Etching the gate material to form a gate electrode; Etching the dielectric layer to form a source dielectric layer and a gate dielectric layer, wherein the source dielectric layer covers the accumulation type channel and the partition structure.
10. The method of manufacturing a fast recovery MOSFET structure according to claim 9, further comprising the steps of: Constructing a gate-source isolation layer on the gate structure; Constructing a drain electrode on the back surface of the substrate; and constructing a source electrode on the source region and the source dielectric layer.

Description

Quick recovery MOSFET structure and manufacturing method thereof Technical Field The invention belongs to the technical field of power devices, and particularly relates to a fast recovery MOSFET structure and a manufacturing method thereof. Background Silicon carbide (SiC) power MOSFET, which is a new generation of wide band gap power device, has the advantages of high voltage resistance, low on-resistance, high switching speed and the like, and is widely applied to the fields of new energy automobiles, power supply conversion, industrial driving and the like. However, siC MOSFET devices themselves inevitably present parasitic body diode structures. Because of the characteristics of SiC materials, the forward conduction voltage of the parasitic body diode is higher, the typical value can exceed 2.5V, the reverse recovery charge is large, the reverse recovery speed is high, and a severe reverse recovery process is more easy to generate under the high-frequency working condition. The above-described characteristics of the parasitic body diode may cause various adverse effects. For example, high forward voltage drop causes obvious conduction loss, reduces system efficiency, large current peak and overvoltage generated in the reverse recovery process can cause the aggravation of electromagnetic interference (EMI) of devices and systems, even increases stress and failure risk of a switching tube, and the turn-on of a parasitic diode can also cause extra loss caused by the turn-on-off of a body diode, so that the application performance of the SiC MOSFET in high-frequency and high-efficiency topology is limited. Therefore, the method can inhibit the adverse effect of the parasitic body diode and improve the reverse conduction characteristic of the device, and has important significance for improving the overall performance of the SiC device and a power system thereof. To improve the above-mentioned problems, the prior art proposes to integrate a schottky diode (SBD) structure inside a SiC MOSFET, by introducing a schottky channel with reduced forward voltage and no reverse recovery charge, instead of the conduction path of the parasitic body diode. Although the integrated SBD can improve the reverse conduction characteristics to some extent, there are several limitations to this approach. For example, the integrated SBD requires additional doping and metal contact processes, increasing device manufacturing complexity and cost, while the SBD area may introduce additional leakage current and occupy chip area, limiting device design freedom, and long-term reliability of the SBD under high temperature, high pressure conditions remains a challenge. Therefore, there is a need to develop a fast recovery MOSFET structure and a method for fabricating the same to solve the problems in the prior art. Disclosure of Invention The invention aims to provide a MOSFET structure and a manufacturing method thereof, wherein a partition structure, an accumulation type channel and a source medium layer are arranged, so that when the voltage of a source electrode minus a drain electrode is larger than a threshold value, the accumulation type channel is started, and the starting of a parasitic PN diode is restrained, thereby solving the problems of bipolar degradation and reverse recovery caused by the conduction of the parasitic PN junction when a third quadrant in the power MOSFET works, and ensuring high voltage resistance and high frequency performance, and simultaneously having high reliability and low loss. In order to solve the technical problems, the specific technical scheme of the invention is as follows: a fast recovery MOSFET structure comprising: A substrate; An epitaxial layer disposed on the substrate; at least two body regions are arranged in the epitaxial layer, and a partition structure is formed between the two body regions; an active region and an accumulation-type channel are arranged in the body region, and the accumulation-type channel is positioned at one side close to the partition structure; the grid structure is arranged on the epitaxial layer and is provided with at least two grid structures; The source medium layer is arranged on the partition structure and covers the accumulation type channel and the partition structure; and the source electrode is arranged on the source region and the source dielectric layer. Further, the accumulation-type channel is in a depletion state when the source voltage is less than the drain voltage, and is in an on state when the source voltage minus the drain voltage is greater than a threshold. Further, the epitaxial layer is of a first conductivity type, the body region is of a second conductivity type, the source region is of the first conductivity type, and the accumulation channel is of the first conductivity type. Further, the accumulation channel is fully depleted by the body region when Vds is greater than 0; the thickness and doping concentration of the accumulation cha