CN-122028475-A - Field effect transistor and preparation method thereof

Abstract

The present disclosure provides a field effect transistor and a method of manufacturing the same. The field effect transistor includes a substrate, an epitaxial layer on an upper surface of the substrate, a gate electrode, a first well region, a second well region, a first source region, a second source region, a source electrode, and a drain electrode. The gate includes a lateral portion extending laterally within the epitaxial layer and a vertical portion extending from the lateral portion toward the substrate. The first well region in the epitaxial layer includes a first portion extending from a sidewall of the vertical portion away from the vertical portion and a second portion extending from a lower surface of the lateral portion toward the substrate. A second well region in the epitaxial layer extends from the lateral wall of the lateral portion away from the lateral portion. The first source region in the epitaxial layer is on a side of the first well region remote from the substrate. The second source region in the epitaxial layer is on a side of the second well region remote from the substrate. A source electrode is located on the first source region and the second source region, and a drain electrode is located on a lower surface of the substrate.

Inventors

• FAN SHOUXIN
• ZHENG ZHEYANG
• DONG YANG
• WU JIAYANG

Assignees

• 中国科学技术大学

Dates

Publication Date

20260512

Application Date

20260214

Claims (13)

1. 1. A field effect transistor, comprising: a substrate doped to a first conductivity type; an epitaxial layer on an upper surface of the substrate doped to the first conductivity type; A gate including a lateral portion extending laterally within the epitaxial layer and a vertical portion extending from the lateral portion toward the substrate; a first well region in the epitaxial layer doped to a second conductivity type, including a first portion extending from a sidewall of the vertical portion away from the vertical portion and a second portion extending from a lower surface of the lateral portion toward the substrate; a second well region in the epitaxial layer doped to the second conductivity type extending from a sidewall of the lateral portion away from the lateral portion; A first source region in the epitaxial layer doped to the first conductivity type on a side of the first well region remote from the substrate; A second source region in the epitaxial layer doped to the first conductivity type on a side of the second well region remote from the substrate; Source electrodes on the first source region and the second source region; a drain electrode on a lower surface of the substrate.
2. 2. The field effect transistor of claim 1, wherein the field effect transistor further comprises: a shield gate within the epitaxial layer extending from a lower surface of the gate toward the substrate; A shield layer in the epitaxial layer is doped to the second conductivity type, extends along a lower surface and sidewalls of the shield gate, and is spaced apart from the first well region.
3. 3. The field effect transistor of claim 2, wherein the field effect transistor further comprises: a current spreading layer in the epitaxial layer doped to the first conductivity type, the current spreading layer abutting the first well region and the second well region on a side of the first well region and the second well region facing away from the first source region and the second source region; the doping concentration of the current expansion layer is larger than that of the epitaxial layer and smaller than that of the first source region and the second source region.
4. 4. The field effect transistor of claim 3, wherein the current spreading layer extends into a space between the shielding layer and the first well region.
5. 5. The field effect transistor of claim 1, wherein the field effect transistor further comprises: a first doped region on the first well region doped to the second conductivity type extending from the source electrode to the first well region; A second doped region on the second well region, doped to the second conductivity type, extends from the source electrode to the second well region.
6. 6. The field effect transistor of claim 5, wherein the first source region surrounds a sidewall of the first doped region and the second doped region is on a side of the second source region opposite the gate.
7. 7. The field effect transistor of claim 5 wherein a lateral portion of the gate has an opening, the source electrode extending through the opening to the first well region and the first source region and being electrically isolated from the gate by a dielectric layer on a sidewall of the opening.
8. 8. The field effect transistor of any one of claims 1-7, wherein the epitaxial layer comprises silicon carbide.
9. 9. A method of manufacturing a field effect transistor, comprising: Forming an epitaxial layer on an upper surface of the substrate, the substrate and the epitaxial layer being doped to a first conductivity type; forming a first well region in the epitaxial layer, the first well region being doped to a second conductivity type; forming a first source region in the first well region, the first source region being doped to the first conductivity type; Forming a gate trench in the epitaxial layer, forming a gate within the gate trench, wherein the gate includes a lateral portion extending laterally and a vertical portion extending from the lateral portion toward the substrate, wherein after forming the first source region, the first well region includes a first portion extending from a sidewall of the vertical portion away from the vertical portion and a second portion extending from a lower surface of the lateral portion toward the substrate and surrounding the first source region; Forming a second well region in the epitaxial layer, the second well region being doped to the second conductivity type; Forming a second source region in the second well region, the second source region being doped to the first conductivity type, wherein, after the second source region is formed, the second well region extends away from the lateral portion from a sidewall of the lateral portion, the second source region being on a side of the second well region away from the substrate; A source electrode is formed on the first source region and the second source region and a drain electrode is formed on a lower surface of the substrate.
10. 10. The method of manufacturing of claim 9, wherein after forming a gate trench in the epitaxial layer and before forming a gate within the gate trench, the method of manufacturing further comprises: Doping the epitaxial layer through the gate trench, forming a shielding layer in the epitaxial layer, the shielding layer being doped to the second conductivity type, the shielding layer having a spacing from the first well region; forming a shielding gate on the shielding layer in the gate trench; wherein the gate electrode is formed on the shield gate electrode.
11. 11. The method of manufacturing of claim 9, wherein prior to forming the first well region in the epitaxial layer, the method of manufacturing further comprises: Forming a current spreading layer in the epitaxial layer by doping the epitaxial layer, the epitaxial spreading layer being doped to the first conductivity type, wherein a doping concentration of the current spreading layer is greater than a doping concentration of the epitaxial layer and less than doping concentrations of the first source region and the second source region; wherein the first well region is formed in the current spreading layer.
12. 12. The method of claim 9, wherein the epitaxial layer comprises a first epitaxial layer and a second epitaxial layer on the first epitaxial layer; Forming the first epitaxial layer on the substrate, forming the first well region and the first source region in the first epitaxial layer, and then forming the second epitaxial layer on the first epitaxial layer, and forming the second well region and the second source region in the second epitaxial layer; Forming a gate trench in the epitaxial layer includes etching the first epitaxial layer to form a trench corresponding to a vertical portion of the gate; Forming the gate includes forming the vertical portion within the trench and forming the lateral portion on an upper surface of the first epitaxial layer, wherein the second epitaxial layer is formed on an upper surface of the first epitaxial layer exposed by the lateral portion of the gate.
13. 13. The method of manufacturing according to claim 12, characterized in that the method of manufacturing further comprises: forming a second doped region in the second well region on a side of the second source region opposite the gate, the second doped region being doped to the second conductivity type and extending from the source electrode to the first well region; An opening is made in a lateral portion of the gate to expose the first source region and a first doped region is formed in the first source region via the opening, the first doped region being doped to the second conductivity type and extending from the source electrode to the second well region.

Description

Field effect transistor and preparation method thereof Technical Field The present disclosure relates to the field of semiconductor device technology, and in particular, to a field effect transistor and a method for manufacturing the same. Background The power Metal-Oxide-semiconductor field effect transistor (MOSFET) is widely used, for example, it has been applied in the fields of main driving inverter, on-board charger (OBC), photovoltaic inverter, energy storage system, etc. of new energy vehicles. However, the device structure of the power MOSFET in the related art still has many challenges and technical bottlenecks. Disclosure of Invention In view of the foregoing, the present disclosure provides a field effect transistor and a method of manufacturing the same. According to a first aspect of the present disclosure, there is provided a field effect transistor comprising a substrate, an epitaxial layer on an upper surface of the substrate, a gate electrode, a first well region, a second well region, a first source region, a second source region, a source electrode and a drain electrode. The substrate and the epitaxial layer are doped to a first conductivity type. The gate includes a lateral portion extending laterally within the epitaxial layer and a vertical portion extending from the lateral portion toward the substrate. The first well region in the epitaxial layer is doped to a second conductivity type, including a first portion extending from a sidewall of the vertical portion away from the vertical portion and a second portion extending from a lower surface of the lateral portion toward the substrate. The second well region in the epitaxial layer is doped to a second conductivity type extending from the sidewall of the lateral portion away from the lateral portion. The first source region in the epitaxial layer is doped to the first conductivity type on a side of the first well region remote from the substrate. The second source region in the epitaxial layer is doped to the first conductivity type on a side of the second well region remote from the substrate. A source electrode is located on the first source region and the second source region, and a drain electrode is located on a lower surface of the substrate. According to an embodiment of the present disclosure, the field effect transistor further includes a shield gate and a shield layer. The shield gate within the epitaxial layer extends from a lower surface of the gate toward the substrate. The shield layer in the epitaxial layer is doped to a second conductivity type, extends along the lower surface and sidewalls of the shield gate, and is spaced apart from the first well region. According to an embodiment of the present disclosure, the field effect transistor further includes a current spreading layer. The current spreading layer in the epitaxial layer is doped to a first conductivity type, and the current spreading layer adjoins the first well region and the second well region at a side of the first well region and the second well region opposite to the first source region and the second source region. The doping concentration of the current spreading layer is greater than the doping concentration of the epitaxial layer and less than the doping concentrations of the first source region and the second source region. According to an embodiment of the present disclosure, the current spreading layer extends into the space between the shielding layer and the first well region. According to an embodiment of the present disclosure, the field effect transistor further includes a first doped region and a second doped region. The first doped region on the first well region is doped to a second conductivity type extending from the source electrode to the first well region. The second doped region on the second well region is doped to a second conductivity type extending from the source electrode to the second well region. According to an embodiment of the disclosure, the first source region surrounds a sidewall of the first doped region, and the second doped region is on a side of the second source region facing away from the gate. According to an embodiment of the present disclosure, a lateral portion of the gate has an opening, and the source electrode extends to the first well region and the first source region via the opening and is electrically isolated from the gate by a dielectric layer on a sidewall of the opening. According to an embodiment of the present disclosure, the epitaxial layer comprises silicon carbide. According to a second aspect of the present disclosure, a method of manufacturing a field effect transistor is provided. The method includes forming an epitaxial layer on an upper surface of a substrate, the substrate and the epitaxial layer being doped to a first conductivity type, forming a first well region in the epitaxial layer, the first well region being doped to a second conductivity type, forming a first source region in t