CN-122028486-A - Power device package

Abstract

The invention discloses a power device package, which comprises a ceramic base circuit board, a circuit board frame, a silicon-based transistor or a silicon-based driving circuit, a novel transistor which is resistant to high temperature and is arranged on the high-temperature-resistant ceramic circuit board layer, and a silicon-based transistor or a driving circuit which is relatively low in temperature resistance and is arranged on a common circuit board layer. The high-temperature-resistant novel transistor wafer is arranged in the hole of the circuit board frame, so that the packaging cost is reduced, and the packaging process is optimized.

Inventors

• ZHAO ZHENTAO

Assignees

• 摩驱科技(深圳)有限公司

Dates

Publication Date

20260512

Application Date

20250222

Claims (3)

1. 1. A power device package is characterized by comprising a ceramic base circuit board, a gallium nitride or silicon carbide transistor wafer, a group of bonding pads, two or more than two groups of external bonding pads, a circuit board frame and a circuit board frame, wherein the ceramic base circuit board comprises a bottom layer circuit layer and a ceramic base layer, the gallium nitride or silicon carbide transistor wafer is welded on the bottom layer circuit layer of the ceramic base circuit board, the group of bonding pads for welding the gallium nitride or silicon carbide transistor wafer is arranged on the bottom layer circuit layer of the ceramic base circuit board, the two or more than two groups of external bonding pads are arranged on the bottom layer circuit layer of the circuit board frame, the circuit board frame consists of a top layer circuit layer of the circuit board frame, the substrate layer and a bottom layer circuit layer of the circuit board frame, a group of butt bonding pads which are in butt joint with a group of external bonding pads arranged on the bottom layer circuit layer of the ceramic base circuit board are correspondingly welded on the bottom layer circuit layer of the ceramic base circuit board, the gallium nitride or silicon carbide transistor wafer is placed in holes of the circuit board frame, the silicon base transistor or silicon substrate wafer is welded on the circuit board frame, the circuit board frame is connected with the two or more than two groups of bonding pads which are correspondingly arranged on the top layer circuit board through the circuit frame through the through holes, and the circuit board frame is correspondingly welded on the top layer or the circuit board.
2. 2. A power device package as recited in claim 1 wherein the GaN or SiC transistor wafers soldered to the underlying wiring layer of the ceramic substrate are a set of two or more GaN or SiC transistor wafers.
3. 3. The power device package of claim 1 wherein the ceramic substrate is a multi-layer ceramic substrate comprising a top wiring layer, a ceramic substrate layer and a bottom wiring layer.

Description

Power device package Technical Field The invention relates to a packaging process for a power device, a chip heat dissipation process optimization and an architecture design, and relates to a sealing technology of a silicon-based transistor or a chip and a third-generation and fourth-generation semiconductor transistor. Background The ceramic base circuit board is composed of ceramic base material and one or two conductive layers, and it is a special technological method for directly bonding copper foil to the surface of ceramic base material at high temperature, and has high heat conductivity. Third generation semiconductor materials GaN (gallium nitride) and SiC (silicon carbide) are representative of wide bandgap semiconductors. The forbidden band width of GaN is three times that of Si, and the breakdown electric field is ten times that of Si. Therefore, the power device manufactured by gallium nitride has the remarkable characteristics of high switching speed, low on-resistance, small chip area and the like, and is widely applied to the fields of power adapters, industrial power supplies, automobile electronics and the like. GaN power devices are generally classified into normally open (depletion) and normally closed (enhancement) gallium nitride. The depletion type GaN solution in the market at present is mainly synthesized by a depletion type GaN power device and a low-voltage Si (silicon) MOS tube (field effect tube) device, and the GaN power device can be flexibly matched with the low-voltage Si device in consumer electronics application, so that the application characteristics of high frequency and high conversion efficiency of GaN can be fully utilized, and the GaN power device can be fully compatible with the Si MOS tube in driving. The ultra-wide band gap power devices of the fourth generation semiconductor materials mainly represented by diamond, gallium oxide and the like are also put into practical use, and can also work at higher temperature. The tolerable operating temperature of the third and fourth generation semiconductor material power devices is much higher than that of Si (silicon) devices. When the Si power device or the Si driving device and the third and fourth generation semiconductor material power devices (such as GaN or SiC transistors) are in the same package, the operable temperature of the package device is the operating temperature of the Si device, and the practical operable temperature of the GaN or SiC transistors in the package is far greater than the operating temperature of the Si device, so that the capability of the third and fourth generation semiconductor material power devices cannot be exerted, and the application range of the novel power device is limited. Because the driving voltage of the enhancement type GaN transistor is lower than that of the Si MOS transistor, if the electronic system adopts the driving chip of the Si MOS transistor, the output driving signal needs to be reduced in voltage before the enhancement type GaN transistor is driven. Disclosure of Invention Aiming at the problems, the invention aims to provide a power device package, wherein a Si MOS tube or a Si driving device and a third and fourth generation semiconductor material power device (such as a GaN or SiC transistor) are arranged on different circuit board layers in the same package, so that the higher operable temperature of the whole package is realized, and the advantages of the novel power device are exerted. The scheme of the invention is that the power device package comprises a ceramic base circuit board, a gallium nitride or silicon carbide transistor wafer, a group of bonding pads for bonding the gallium nitride or silicon carbide transistor wafer, a circuit board frame and a driving circuit board, wherein the ceramic base circuit board comprises a bottom layer circuit layer and a ceramic base layer, the gallium nitride or silicon carbide transistor wafer is bonded on the bottom layer circuit layer of the ceramic base circuit board, a group of bonding pads for bonding the gallium nitride or silicon carbide transistor wafer are arranged on the bottom layer circuit layer of the ceramic base circuit board, two or more than two groups of external bonding pads are also arranged on the bottom layer circuit layer of the circuit board frame, the circuit board frame comprises a top layer circuit layer, a substrate layer and a bottom layer circuit layer of the circuit board frame, a group of butt bonding pads for butt-jointing with a group of external bonding pads arranged on the bottom layer circuit layer of the ceramic base circuit board are arranged on the top layer circuit board, the group of butt-joint bonding pads correspond to a group of external bonding pads arranged on the bottom layer circuit layer of the ceramic base circuit board, the gallium nitride or silicon carbide transistor wafer is arranged in holes of the circuit board frame, two or more than two groups of the sili