CN-122028503-A - Display panel and display device

Abstract

The application relates to a display panel and a display device, comprising a substrate, a driving circuit layer and a target electrode, wherein the driving circuit layer is positioned on one side of the substrate and comprises a pixel circuit, a first conductive structure and a plurality of first active structures, the pixel circuit comprises a plurality of driving transistors, one driving transistor is used for driving a light-emitting element to emit light, the orthographic projection of the first conductive structure on the substrate is at least partially overlapped with the orthographic projection of the plurality of first active structures on the substrate, the first active structures are used for forming a source electrode and a drain electrode of the driving transistors, the first conductive structure is used for forming a grid electrode of the driving transistors, and the target electrode of the driving transistors is electrically connected and comprises at least one of the source electrode or the grid electrode. The display panel has higher pixel density.

Inventors

• CHAI HUIPING

Assignees

• 武汉天马微电子有限公司上海分公司

Dates

Publication Date

20260512

Application Date

20260205

Claims (20)

1. 1. A display panel, comprising: A substrate; the driving circuit layer is positioned on one side of the substrate and comprises a pixel circuit, a first conductive structure and a plurality of first active structures; The pixel circuit comprises a plurality of driving transistors, a first conducting structure, a second conducting structure, a first active structure and a second conducting structure, wherein the driving transistors are used for driving a light-emitting element to emit light, the orthographic projection of the first conducting structure on the substrate is corresponding to at least partially overlapped with orthographic projections of the first active structures on the substrate, the first active structure is used for forming a source electrode and a drain electrode of the driving transistors, and the first conducting structure is used for forming grid electrodes of the driving transistors; A plurality of target poles of the driving transistors are electrically connected, the target poles including at least one of the source electrodes or the gate electrodes.
2. 2. The display panel of claim 1, wherein the target electrode comprises the gate electrode, wherein, The first conductive structure comprises a plurality of first conductive plates, a plurality of first conductive plates are in contact connection, or The first conductive structure comprises a first connecting part and a plurality of first conductive polar plates, wherein the first conductive polar plates are arranged at intervals, and the first conductive polar plates are connected through the first connecting part.
3. 3. The display panel of claim 1 or 2, wherein the target electrode comprises the source electrode, wherein, The plurality of the first active structures are in contact connection with or The driving circuit layer further comprises a second connecting portion, a plurality of first active structures are arranged at intervals, and the driving circuit layer is connected through the second connecting portion through the first active structures.
4. 4. The display panel according to claim 3, wherein the driving circuit layer further comprises a plurality of light emission control signal lines extending in a first direction, the light emission control signal lines for transmitting light emission control signals; the first active structures are arranged at intervals in the second direction, one light-emitting control signal line is arranged between two adjacent first active structures, and the first direction is intersected with the second direction.
5. 5. The display panel of claim 2, wherein the driving circuit layer further comprises: An active layer located at one side of the substrate; A first conductive layer located on one side of the active layer away from the substrate; A third conductive layer located at one side of the first conductive layer away from the active layer; the first connecting portion comprises a plurality of first through holes and first sub-connecting portions, the first conductive polar plate is connected with the first sub-connecting portions through the first through holes, the first active structure is located on the active layer, the first conductive polar plate is located on the first conductive layer, and the first sub-connecting portions are located on the third conductive layer.
6. 6. The display panel of claim 5, wherein the pixel circuit further comprises: The first scanning signal line is used for controlling the threshold value compensation process of the driving transistor; and the first pole of the threshold compensation transistor is connected with the drain electrode of the driving transistor, the second pole of the threshold compensation transistor is connected with the gate electrode of the driving transistor, and the part of the first scanning signal line is the gate electrode of the threshold compensation transistor.
7. 7. The display panel of claim 6, wherein the driving circuit layer further comprises a second active structure, the first connection portion further comprises a second via; The first scanning signal line is positioned on the first conductive layer, the second active structure is positioned on the active layer, and the orthographic projection of the second active structure on the substrate at least partially overlaps with the orthographic projection of the first scanning signal line on the substrate; The first ends of the first active structures are connected with each other, the first ends of the second active structures are connected with the second ends of the first target active structures, and the second ends of the second active structures are connected with the first sub-connecting parts through the second through holes, wherein the first target active structures are first active structures closest to the first scanning signal lines in the second direction among the first active structures.
8. 8. The display panel of claim 5, wherein the pixel circuit further comprises: The second scanning signal is used for controlling the grid resetting process of the driving transistor; a gate reset signal line for transmitting a gate reset signal; and the first pole of the grid reset transistor is connected with the grid of the driving transistor, the second pole of the grid reset transistor is connected with the grid reset signal line, and the part of the second scanning signal line is the grid of the grid reset transistor.
9. 9. The display panel of claim 8, wherein the driving circuit layer further comprises a third active structure; the first connecting part further comprises a second via hole; The driving circuit layer also comprises a second conductive layer, wherein the second conductive layer is positioned between the first conductive layer and the third conductive layer; the second scanning signal line is positioned on the first conductive layer, and the orthographic projection of the third active structure on the substrate at least partially overlaps with the orthographic projection of the second scanning signal line on the substrate; The first ends of the first active structures are connected with each other, the first end of the third active structure is connected with the first sub-connecting part through the second via hole, and the second end of the third active structure is connected with the grid reset signal line.
10. 10. The display panel of claim 2, wherein the driving circuit layer further comprises: An active layer located at one side of the substrate; A first conductive layer located on one side of the active layer away from the substrate; The first active structure is located on the active layer, the first conductive electrode plate is located on the first conductive layer, and the plurality of first conductive electrode plates are in contact connection with the first conductive layer.
11. 11. The display panel of claim 10, wherein the driving circuit layer further comprises a third connection portion, a first scan signal line, and a second active structure, the third connection portion comprising a third via, a fourth via, and a third sub-connection portion; the driving circuit layer also comprises a third conductive layer, wherein the third conductive layer is positioned at one side of the first conductive layer far away from the active layer; The first scanning signal line is positioned on the first conductive layer, extends along a first direction and is used for transmitting the first scanning signal, and the first scanning signal is used for controlling the threshold value compensation process of the driving transistor; The third sub-connection part is positioned on the third conductive layer, and the second active structure is positioned on the active layer; orthographic projection of the second active structure on the substrate at least partially overlaps orthographic projection of the first scanning signal line on the substrate; The first ends of the first active structures are connected with each other, the first end of the second active structure is connected with the second end of the first target active structure, the second end of the second active structure is connected with the third sub-connecting part through the third via hole, and the first target conductive polar plate is connected with the third sub-connecting part through the fourth via hole; The first target active structure is a first active structure closest to the first scanning signal line in a second direction in the first active structures, and the first target conductive polar plate is a first conductive polar plate overlapped with the first target active structure in the first conductive polar plates.
12. 12. The display panel according to claim 2, wherein the driving circuit layer further comprises a first power signal line, a second conductive structure, and the driving circuit layer further comprises a first conductive layer, a second conductive layer, and a fourth conductive layer; the first conductive layer is positioned on one side of the substrate, the second conductive layer is positioned on one side of the first conductive layer away from the substrate, and the fourth conductive layer is positioned on one side of the second conductive layer away from the active layer; The first conductive polar plate is positioned on the first conductive layer, the second conductive structure is positioned on the second conductive layer, the first power signal line is positioned on the fourth conductive layer, the second conductive structure is connected with the first power signal line, and the orthographic projection of the second conductive structure on the substrate at least partially overlaps with the orthographic projection of the first conductive structure on the substrate.
13. 13. The display panel of claim 12, wherein the second conductive structure comprises a plurality of second conductive plates, the plurality of second conductive plates being in contact with each other at the second conductive layer, or The driving circuit layer further comprises a fourth connecting portion and a plurality of second conductive polar plates, the second conductive polar plates are arranged at intervals, and the second conductive polar plates are connected through the fourth connecting portion.
14. 14. The display panel of claim 3, wherein the driving circuit layer further comprises: An active layer located at one side of the substrate; a third conductive layer located at one side of the active layer away from the substrate; The second connecting portion comprises a plurality of twenty-fifth through holes and a second sub-connecting portion; the first active structure is located on the active layer, the second sub-connection portion is located on the third conductive layer, and the first end of the first active structure is connected with the second sub-connection portion through the twenty-fifth through hole.
15. 15. The display panel of claim 14, wherein the pixel circuit further comprises: the first scanning signal is used for controlling the data writing process of the driving transistor; A data signal line for transmitting a data signal; And the first pole of the data writing transistor is connected with the source electrode of the driving transistor, the second pole of the data writing transistor is connected with the data signal line, and the part of the first scanning signal line is the grid electrode of the data writing transistor.
16. 16. The display panel of claim 15, wherein the driving circuit layer further comprises a fourth active structure, the driving circuit layer further comprising: A first conductive layer located at one side of the active layer away from the substrate, and located at one side of the third conductive layer close to the active layer; A fourth conductive layer located at one side of the third conductive layer away from the active layer; The first scanning signal line is positioned on the first conductive layer, the data signal line is positioned on the fourth conductive layer, and the fourth active structure is positioned on the active layer; orthographic projection of the fourth active structure on the substrate at least partially overlaps orthographic projection of the first scanning signal line on the substrate; The first end of the fourth active structure is connected with the first end of the first target active structure, the second end of the fourth active structure is connected with the data signal line, and the first target active structure is the first active structure closest to the first scanning signal line in the second direction among the plurality of first active structures.
17. 17. The display panel of claim 14, wherein the pixel circuit further comprises: the third scanning signal is used for controlling the bias adjustment process of the driving transistor; A bias adjustment signal line for transmitting a bias adjustment signal; and the first pole of the bias adjusting transistor is connected with the source electrode of the driving transistor, the second pole of the bias adjusting transistor is connected with the bias adjusting signal line, and the part of the third scanning signal line is the grid electrode of the bias adjusting transistor.
18. 18. The display panel of claim 17, wherein the driving circuit layer further comprises a fifth active structure and a fifth connection portion, the fifth connection portion comprising a fifth via, a sixth via, and a fifth sub-connection portion, the driving circuit layer further comprising: A first conductive layer located at one side of the active layer away from the substrate, and located at one side of the third conductive layer close to the active layer; A second conductive layer between the first conductive layer and the third conductive layer The fifth active structure is positioned on the active layer, the third scanning signal line is positioned on the first conductive layer, the bias adjustment signal line is positioned on the second conductive layer, and the fifth sub-connection part is positioned on the third conductive layer; the first end of the fifth active structure is connected with the fifth sub-connecting part through the fifth via hole, the first end of the second target active structure is connected with the fifth sub-connecting part through the sixth via hole, and the second end of the fifth active structure is connected with the bias adjusting signal line; The second target active structure is a first active structure closest to the third scanning signal line in a second direction among the plurality of first active structures, and the bias adjustment signal line is located at one side of the third scanning signal line away from the first active structure in the second direction.
19. 19. The display panel of claim 14, wherein the pixel circuit further comprises: A plurality of light emission control signal lines for transmitting light emission control signals; A first power signal line for transmitting a first power signal; A plurality of light emission control modules, the light emission control modules comprising: A first light emitting control transistor, a first pole of which is used for receiving a first power supply signal, a second pole of which is connected with a source electrode of the driving transistor, and a grid electrode of which is used for receiving a light emitting control signal; A second light emission control transistor, a first electrode of which is connected with a drain electrode of the driving transistor, a second electrode of which is connected with an anode electrode of the light emitting element, and a gate electrode of which is used for receiving the light emission control signal; Wherein, a said light-emitting control module is used for controlling a said light-emitting component to emit light.
20. 20. The display panel of claim 19, wherein the driving circuit layer further comprises a plurality of sixth active structures, a plurality of seventh active structures, and a plurality of anode structures, the driving circuit layer further comprising: A first conductive layer located at one side of the active layer away from the substrate, and located at one side of the third conductive layer close to the active layer; A fourth conductive layer located at one side of the third conductive layer away from the first conductive layer; A fifth conductive layer located on a side of the fourth conductive layer away from the third conductive layer; The light emitting control signal line is positioned on the first conductive layer, the first power supply signal line is positioned on the fourth conductive layer, the anode structure is positioned on the fifth conductive layer, the front projection of the sixth active structure on the substrate is overlapped with the front projection of the light emitting control signal line on the substrate, the front projection of the seventh active structure on the substrate is overlapped with the front projection of the light emitting control signal line on the substrate, the light emitting control signal line overlapped by the different sixth active structure is different, and the light emitting control signal line overlapped by the different seventh active structure is different; A first end of the sixth active structure is connected with a first end of the first active structure, and a second end of the sixth active structure is connected with the first power signal line; a first end of the seventh active structure is connected with a second end of the first active structure, and a second end of the seventh active structure is connected with the anode structure.

Description

Display panel and display device Technical Field The present application relates to the field of display technologies, and in particular, to a display panel and a display device. Background At present, the display technology is widely applied to the display of televisions, mobile phones and public information, and brings great convenience to the daily life and work of people. However, the display panel in the related art has a problem in that the pixel density is not high. Disclosure of Invention Based on this, it is necessary to provide a display panel and a display device, aiming at improving the pixel density in the display panel. In a first aspect, an embodiment of the present application provides a display panel, including: A substrate; the driving circuit layer is positioned on one side of the substrate and comprises a pixel circuit, a first conductive structure and a plurality of first active structures; The pixel circuit comprises a plurality of driving transistors, a first conducting structure, a second conducting structure, a first active structure and a second conducting structure, wherein the driving transistors are used for driving a light-emitting element to emit light, the orthographic projection of the first conducting structure on the substrate is corresponding to at least partially overlapped with orthographic projections of the first active structures on the substrate, the first active structure is used for forming a source electrode and a drain electrode of the driving transistors, and the first conducting structure is used for forming grid electrodes of the driving transistors; A plurality of target poles of the driving transistors are electrically connected, the target poles including at least one of the source electrodes or the gate electrodes. In a second aspect, an embodiment of the present application further provides a display apparatus, where the display apparatus includes the display panel provided in the first aspect. The display panel and the display device provided by the embodiment of the application comprise a substrate and a driving circuit layer, wherein the driving circuit layer comprises a pixel circuit, a first conductive structure and a plurality of first active structures, the pixel circuit comprises a plurality of driving transistors for driving the light-emitting elements to emit light, the orthographic projection of the first conductive structure on the substrate is at least partially overlapped with the orthographic projection of the plurality of first active structures on the substrate, the first active structures can form a source electrode and a drain electrode of the driving transistors, and the first conductive structure can form a grid electrode of the driving transistors. In the application, the source electrodes of the driving transistors are electrically connected, and/or the grid electrodes of the driving transistors are electrically connected, so that a set of circuits for threshold compensation and/or data writing are not required to be arranged for each driving transistor, thereby saving wiring space in layout design and improving pixel density in limited layout space. Drawings Fig. 1 is a schematic cross-sectional view of a display panel according to an embodiment of the present application; fig. 2 is a schematic circuit diagram of a pixel circuit according to an embodiment of the present application; Fig. 3 is a schematic layout structure of a first conductive layer according to an embodiment of the present application; Fig. 4 is a schematic layout structure of an active layer according to an embodiment of the present application; Fig. 5 is a schematic diagram of a layout structure of a pixel circuit according to an embodiment of the present application; fig. 6 is a schematic layout structure of another first conductive layer according to an embodiment of the present application; fig. 7 is a schematic layout structure of another active layer according to an embodiment of the present application; Fig. 8 is a schematic layout structure of a third conductive layer according to an embodiment of the present application; Fig. 9 is a schematic layout structure of a first insulating layer, a second insulating layer, and a third insulating layer according to an embodiment of the present application; Fig. 10 is a schematic diagram of a layout structure of a second conductive layer according to an embodiment of the present application; FIG. 11 is a schematic diagram of a layout structure of another pixel circuit according to an embodiment of the present application; Fig. 12 is a schematic layout structure of another third conductive layer according to an embodiment of the present application; Fig. 13 is a schematic layout structure of another first insulating layer, a second insulating layer, and a third insulating layer according to an embodiment of the present application; fig. 14 is a schematic layout structure of a fourth conductive layer according to an