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CN-122028562-A - Light emitting diode and manufacturing method thereof

CN122028562ACN 122028562 ACN122028562 ACN 122028562ACN-122028562-A

Abstract

The present disclosure provides a light emitting diode and a method for manufacturing the same, which belong to the field of light emitting devices. The light-emitting diode comprises an epitaxial layer and a side wall blocking layer, wherein the epitaxial layer comprises an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer, the multiple quantum well layer is located between the N-type semiconductor layer and the P-type semiconductor layer, the epitaxial layer comprises a step, the top surface of the step is located on the P-type semiconductor layer, the bottom surface of the step is located on the N-type semiconductor layer, the side wall of the step extends from the P-type semiconductor layer to the N-type semiconductor layer, the side wall blocking layer covers the side wall of the step, and the side wall blocking layer is a high-aluminum doped P-type semiconductor layer.

Inventors

  • YAO ZHEN
  • CONG YING
  • XU ZHIBO

Assignees

  • 京东方华灿光电(苏州)有限公司

Dates

Publication Date
20260512
Application Date
20260212

Claims (10)

  1. 1. A light emitting diode, characterized in that the light emitting diode comprises an epitaxial layer (10) and a sidewall barrier layer (20); The epitaxial layer (10) comprises an N-type semiconductor layer (101), a multiple quantum well layer (102) and a P-type semiconductor layer (103), wherein the multiple quantum well layer (102) is positioned between the N-type semiconductor layer (101) and the P-type semiconductor layer (103), the epitaxial layer (10) comprises a step (110), the top surface of the step (110) is positioned on the P-type semiconductor layer (103), the bottom surface of the step (110) is positioned on the N-type semiconductor layer (101), and the side wall of the step (110) extends from the P-type semiconductor layer (103) to the N-type semiconductor layer (101); The side wall barrier layer (20) covers the side wall of the step (110), and the side wall barrier layer (20) is a high-aluminum doped P-type semiconductor layer (103).
  2. 2. The led of claim 1, wherein said sidewall barrier layer (20) is an Al doped P-type GaN layer, wherein the Al composition is 0.35-0.45.
  3. 3. The led of claim 2, wherein said sidewall barrier layer (20) has a thickness of 30-70 nm.
  4. 4. The led of claim 2, wherein the P-type dopant in the sidewall barrier layer (20) is Mg, and the Mg doping concentration is 4e19 to 8e19cm -3 .
  5. 5. The led of any of claims 1 to 4, wherein said sidewall barrier (20) is grown by epitaxial growth, and said sidewall barrier (20) has a V/III ratio greater than 4000 and a growth rate of 0.2 to 0.4 μm/h.
  6. 6. A method of fabricating a light emitting diode, the method comprising: Growing an epitaxial layer, wherein the epitaxial layer comprises an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer, and the multiple quantum well layer is positioned between the N-type semiconductor layer and the P-type semiconductor layer; patterning the epitaxial layer to form a step, wherein the top surface of the step is positioned on the P-type semiconductor layer, the bottom surface of the step is positioned on the N-type semiconductor layer, and the side wall of the step extends from the P-type semiconductor layer to the N-type semiconductor layer; manufacturing a side wall barrier layer covering the step, wherein the side wall barrier layer is a high-aluminum doped P-type semiconductor layer; And carrying out patterning treatment on the side wall barrier layer, and removing the side wall barrier layers on the top surface and the bottom surface of the step, so that the side wall barrier layer covers the side wall of the step.
  7. 7. The method of claim 6, wherein the sidewall barrier layer is a P-type GaN layer doped with Al, wherein the Al is 0.35-0.45.
  8. 8. The method of claim 7, wherein fabricating a sidewall barrier overlying the step comprises: And growing the Al-doped P-type GaN layer in the MOCVD cavity at the temperature of 930-980 ℃, wherein the V/III ratio is larger than 4000 during growth, and the growth rate is 0.2-0.4 mu m/h.
  9. 9. The method of claim 8, wherein prior to fabricating the sidewall barrier, the method further comprises: and carrying out surface pretreatment on the step by adopting TMAH solution, wherein the concentration of the TMAH solution is 2-3wt%, the solution temperature is 80-90 ℃, and the treatment time is 10-15 minutes.
  10. 10. The method of claim 8, wherein prior to fabricating the sidewall barrier, the method further comprises: And in the MOCVD cavity, high-temperature annealing is carried out on the epitaxial layer in the atmosphere of NH 3 and N 2 mixed gas at the temperature of 930-980 ℃ for 4-8 minutes.

Description

Light emitting diode and manufacturing method thereof Technical Field The present disclosure relates to the field of light emitting devices, and in particular, to a light emitting diode and a method for manufacturing the same. Background A light emitting Diode (LIGHT EMITTING Diode) chip is a semiconductor electronic element capable of emitting light. As a novel efficient, environment-friendly, green solid-state lighting source, it is being rapidly and widely applied, such as traffic lights, interior and exterior lights of automobiles, urban landscape lighting, cell phone backlights, and the like. The main structure of the light emitting diode is an epitaxial layer, the epitaxial layer comprises an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer which are stacked, and the epitaxial layer is provided with a step extending from the P-type semiconductor layer to the N-type semiconductor layer. For Micro (Micro) light emitting diodes, due to the miniature design, the ratio of the side wall area of a step formed on an epitaxial layer to the volume of the whole epitaxial layer is increased sharply, and the side wall damage defect caused by mesa etching becomes the main center of carrier non-radiative recombination, so that the internal quantum efficiency is reduced sharply, and the light emitting efficiency is reduced. Disclosure of Invention The embodiment of the disclosure provides a light emitting diode and a manufacturing method thereof, which can reduce non-radiative recombination and improve luminous efficiency. The technical scheme is as follows: in one aspect, a light emitting diode is provided that includes an epitaxial layer and a sidewall barrier layer; the epitaxial layer comprises an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer, the multiple quantum well layer is positioned between the N-type semiconductor layer and the P-type semiconductor layer, the epitaxial layer comprises a step, the top surface of the step is positioned on the P-type semiconductor layer, the bottom surface of the step is positioned on the N-type semiconductor layer, and the side wall of the step extends from the P-type semiconductor layer to the N-type semiconductor layer; The side wall barrier layer covers the side wall of the step, and the side wall barrier layer is a high-aluminum doped P-type semiconductor layer. Optionally, the side wall barrier layer is a P-type GaN layer doped with Al, wherein the Al composition is 0.35-0.45. Optionally, the thickness of the side wall barrier layer is 30-70 nm. Optionally, the P-type dopant in the side wall barrier layer is Mg, and the doping concentration of the Mg is 4E19-8E19 cm -3. Optionally, the side wall barrier layer grows in an epitaxial growth mode, the V/III ratio is larger than 4000 when the side wall barrier layer grows, and the growth rate is 0.2-0.4 mu m/h. In another aspect, a method for manufacturing a light emitting diode is provided, the method comprising: Growing an epitaxial layer, wherein the epitaxial layer comprises an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer, and the multiple quantum well layer is positioned between the N-type semiconductor layer and the P-type semiconductor layer; patterning the epitaxial layer to form a step, wherein the top surface of the step is positioned on the P-type semiconductor layer, the bottom surface of the step is positioned on the N-type semiconductor layer, and the side wall of the step extends from the P-type semiconductor layer to the N-type semiconductor layer; manufacturing a side wall barrier layer covering the step, wherein the side wall barrier layer is a high-aluminum doped P-type semiconductor layer; And carrying out patterning treatment on the side wall barrier layer, and removing the side wall barrier layers on the top surface and the bottom surface of the step, so that the side wall barrier layer covers the side wall of the step. Optionally, the side wall barrier layer is a P-type GaN layer doped with Al, wherein the Al composition is 0.35-0.45. Optionally, fabricating a sidewall barrier layer covering the step, including: And growing the Al-doped P-type GaN layer in the MOCVD cavity at the temperature of 930-980 ℃, wherein the V/III ratio is larger than 4000 during growth, and the growth rate is 0.2-0.4 mu m/h. Optionally, before fabricating the sidewall barrier, the method further comprises: and carrying out surface pretreatment on the step by adopting TMAH solution, wherein the concentration of the TMAH solution is 2-3wt%, the solution temperature is 80-90 ℃, and the treatment time is 10-15 minutes. Optionally, before fabricating the sidewall barrier, the method further comprises: And in the MOCVD cavity, high-temperature annealing is carried out on the epitaxial layer in the atmosphere of NH 3 and N 2 mixed gas at the temperature of 930-980 ℃ for 4-8 minutes. The technical scheme p