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CN-122028567-A - Light-emitting diode chip and preparation method thereof

CN122028567ACN 122028567 ACN122028567 ACN 122028567ACN-122028567-A

Abstract

The invention discloses a light-emitting diode chip and a preparation method thereof, and belongs to the technical field of semiconductors. The light-emitting diode chip comprises an epitaxial layer, a distributed Bragg reflection layer, a first electrode and a second electrode, wherein the epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially stacked, the epitaxial layer is provided with a mesa groove, the mesa groove extends from the second semiconductor layer to the first semiconductor layer, the distributed Bragg reflection layer covers the side walls of the second semiconductor layer and the mesa groove, the distributed Bragg reflection layer is provided with at least 9 holes, the holes are located at positions corresponding to the second semiconductor layer and are distributed at intervals, the first electrode is located in the mesa groove and is in contact with the first semiconductor layer, the second electrode covers the distributed Bragg reflection layer, and through holes are in contact with the second semiconductor layer. The embodiment of the disclosure can be beneficial to reducing the working voltage of the light emitting diode chip.

Inventors

  • LOU YONGJIAN
  • Tong Zhidi
  • SONG MINGJUN
  • WEI YANG
  • SONG YUHUA

Assignees

  • 京东方华灿光电(浙江)有限公司

Dates

Publication Date
20260512
Application Date
20260413

Claims (9)

  1. 1. The light-emitting diode chip is characterized by comprising an epitaxial layer (10), a distributed Bragg reflection layer (20), a first electrode (30) and a second electrode (40); The epitaxial layer (10) comprises a first semiconductor layer (110), an active layer (120) and a second semiconductor layer (130) which are sequentially stacked, the epitaxial layer (10) is provided with a mesa groove (140), and the mesa groove (140) extends from the second semiconductor layer (130) to the first semiconductor layer (110); The distributed Bragg reflection layer (20) covers the side walls of the second semiconductor layer (130) and the mesa groove (140), the distributed Bragg reflection layer (20) is provided with at least 9 holes (210), each hole (210) is positioned at a position corresponding to the second semiconductor layer (130), the holes (210) are arranged at intervals in a honeycomb mode, three adjacent holes (210) form an equilateral triangle, the inner outline of each hole (210) is in a truncated cone shape, each hole (210) is provided with a first hole opening (211) and a second hole opening (212), and the average pore diameter of each first hole opening (211) and each second hole opening (212) is 3-5 mu m; The first electrode (30) is located within the mesa trench (140) and is in contact with the first semiconductor layer (110); the second electrode (40) is covered on the distributed Bragg reflection layer (20) and penetrates through the hole (210) to be in contact with the second semiconductor layer (130).
  2. 2. The light emitting diode chip of claim 1, wherein the first aperture (211) is remote from the epitaxial layer (10) compared to the second aperture (212), the aperture of the first aperture (211) being no smaller than the aperture of the second aperture (212).
  3. 3. The light emitting diode chip according to claim 1, wherein the longitudinal section of the hole (210) is an isosceles trapezoid, and an included angle between a waist line of the isosceles trapezoid and a bottom side of the isosceles trapezoid away from the epitaxial layer (10) is 30 ° -60 °.
  4. 4. The led chip of claim 1, wherein each of said holes (210) is arranged in an array, and a distance between two of said holes (210) adjacent in a lateral direction or adjacent in a longitudinal direction is 10-15 μm.
  5. 5. The light emitting diode chip of claim 4, wherein the distance between each two of the holes (210) is the same, either laterally adjacent or longitudinally adjacent.
  6. 6. A method of manufacturing a light emitting diode chip, comprising: Preparing an epitaxial layer (10), wherein the epitaxial layer (10) comprises a first semiconductor layer (110), an active layer (120) and a second semiconductor layer (130) which are sequentially stacked, the first semiconductor layer (110) is of a first conductivity type, the second semiconductor layer (130) is of a second conductivity type, and the second conductivity type is different from the first conductivity type; -etching the epitaxial layer (10) to obtain mesa trenches (140), the mesa trenches (140) extending from the second semiconductor layer (130) to the first semiconductor layer (110); Preparing a distributed Bragg reflection layer (20), wherein the prepared distributed Bragg reflection layer (20) covers the side wall of the mesa groove (140) and the second semiconductor layer (130); Etching the distributed Bragg reflection layer (20) to form at least 9 holes (210) on the distributed Bragg reflection layer (20), wherein each hole (210) is positioned at a position corresponding to the second semiconductor layer (130), each hole (210) is arranged in a honeycomb mode at intervals, three adjacent holes (210) form an equilateral triangle, the inner outline of each hole (210) is in a circular truncated cone shape, each hole (210) is provided with a first hole opening (211) and a second hole opening (212), and the average pore diameter of each first hole opening (211) and each second hole opening (212) is 3-5 mu m; -preparing a first electrode (30) and a second electrode (40), the first electrode (30) being located within the mesa trench (140) and being in contact with the first semiconductor layer (110), the second electrode (40) being covered on the distributed bragg reflection layer (20) and being in contact with the second semiconductor layer (130) through the hole (210).
  7. 7. The method of manufacturing according to claim 6, wherein etching the distributed bragg reflection layer (20) comprises: Coating photoresist at a position of the distributed Bragg reflection layer (20) corresponding to the second semiconductor layer (130); Exposing and developing the photoresist to form a photoresist layer; -etching the distributed bragg reflection layer (20) by dry etching to form at least 9 of said holes (210) in the distributed bragg reflection layer (20).
  8. 8. The method of manufacturing according to claim 6, wherein etching the distributed bragg reflective layer (20) further comprises: at least 9 holes (210) are arranged in an array, and the distance between two adjacent holes (210) in the transverse direction or the longitudinal direction is 10-15 mu m.
  9. 9. The method of manufacturing according to claim 8, wherein etching the distributed bragg reflective layer (20) further comprises: The distance between every two adjacent holes (210) in the transverse direction or the longitudinal direction is the same.

Description

Light-emitting diode chip and preparation method thereof Technical Field The disclosure relates to the technical field of semiconductors, and in particular relates to a light emitting diode chip and a preparation method thereof. Background A light emitting diode chip is a semiconductor device capable of converting electric energy into light energy. In the related art, an N-type electrode and a P-type electrode are disposed on one side of an epitaxial layer of a light emitting diode chip, wherein the N-type electrode is electrically connected with an N-type semiconductor layer of the epitaxial layer, and the P-type electrode is electrically connected with a P-type semiconductor layer of the epitaxial layer. In addition, in order to improve the brightness of the light-emitting diode chip, a distributed Bragg reflection layer is arranged between the P-type electrode and the epitaxial layer and used for reflecting light generated by the epitaxial layer, so that the effect of improving the brightness of the light-emitting diode chip is achieved. However, under the barrier of the distributed bragg reflection layer, the operating voltage of the light emitting diode chip is high. Disclosure of Invention The embodiment of the disclosure provides a light-emitting diode chip and a preparation method thereof, which are beneficial to reducing the working voltage of the light-emitting diode chip. The technical scheme is as follows: in one aspect, the disclosed embodiments provide a light emitting diode chip comprising an epitaxial layer, a distributed Bragg reflection layer, a first electrode and a second electrode; the epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially stacked, the epitaxial layer is provided with a mesa groove, and the mesa groove extends from the second semiconductor layer to the first semiconductor layer; the distributed Bragg reflection layer covers the side walls of the second semiconductor layer and the mesa groove, the distributed Bragg reflection layer is provided with at least 9 holes, each hole is located at a position corresponding to the second semiconductor layer, and the holes are mutually distributed at intervals; the first electrode is positioned in the mesa groove and is in contact with the first semiconductor layer; The second electrode covers the distributed Bragg reflection layer and penetrates through the hole to be in contact with the second semiconductor layer. In one implementation of the disclosure, the inner profile of the hole is a truncated cone, the hole has a first orifice and a second orifice, the first orifice is far away from the epitaxial layer compared to the second orifice, and the aperture of the first orifice is not smaller than the aperture of the second orifice. In one implementation of the disclosure, the average pore diameter of the first orifice and the second orifice is 3-5 μm. In one implementation manner of the present disclosure, the longitudinal section of the hole is an isosceles trapezoid, and an included angle between a waist line of the isosceles trapezoid and a bottom edge of the isosceles trapezoid far away from the epitaxial layer is 30 ° to 60 °. In one implementation manner of the present disclosure, each hole is arranged in an array, and a distance between two adjacent holes in a transverse direction or a longitudinal direction is 10-15 μm. In one implementation of the present disclosure, the distance between each two of the holes that are laterally adjacent or longitudinally adjacent is the same. In another aspect, an embodiment of the present disclosure provides a method for manufacturing a light emitting diode chip, including: preparing an epitaxial layer, wherein the epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are sequentially stacked, the first semiconductor layer is of a first conductivity type, the second semiconductor layer is of a second conductivity type, and the second conductivity type is different from the first conductivity type; etching the epitaxial layer to obtain a mesa trench, wherein the mesa trench extends from the second semiconductor layer to the first semiconductor layer; Preparing a distributed Bragg reflection layer, wherein the prepared distributed Bragg reflection layer covers the side wall of the mesa groove and the second semiconductor layer; Etching the distributed Bragg reflection layer to form at least 9 holes on the distributed Bragg reflection layer, wherein each hole is positioned at a position corresponding to the second semiconductor layer and is mutually distributed at intervals; and preparing a first electrode and a second electrode, wherein the first electrode is positioned in the mesa groove and is in contact with the first semiconductor layer, and the second electrode covers the distributed Bragg reflection layer and penetrates through the hole to be in contact wit