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CN-122028579-A - Z-type heterojunction-based optoelectronic synaptic device and preparation method and application thereof

CN122028579ACN 122028579 ACN122028579 ACN 122028579ACN-122028579-A

Abstract

The invention provides a Z-type heterojunction-based photoelectronic synaptic device, a preparation method and application thereof, wherein the photoelectronic synaptic device sequentially comprises a top electrode layer, a Z-type heterojunction functional layer and a bottom electrode layer from top to bottom, the Z-shaped heterojunction functional layer is formed by closely contacting a first semiconductor material layer and a second semiconductor material layer, and energy bands of the first semiconductor material layer and the second semiconductor material layer are staggered to form Z-shaped energy bands. The photoelectron synaptic device has a simple structure, and utilizes a unique carrier recombination mechanism of a Z-type heterojunction to simulate various synaptic behaviors by designing the Z-type heterojunction functional layer, so that bidirectional synaptic function simulation of inhibition/excitation under the same optical stimulus can be realized only by voltage switching, and a core thought is provided for the design of a multifunctional integrated photoelectron synaptic device.

Inventors

  • HUANG WEN
  • LIN ZHENGJIAN
  • WANG LEI
  • LI XINGAO

Assignees

  • 南京邮电大学

Dates

Publication Date
20260512
Application Date
20251231

Claims (9)

  1. 1. The optoelectronic synapse device based on the Z-type heterojunction is characterized by comprising a top electrode layer, a Z-type heterojunction functional layer and a bottom electrode layer from top to bottom, wherein the Z-type heterojunction functional layer is formed by tightly contacting a first semiconductor material layer and a second semiconductor material layer, and energy bands of the first semiconductor material layer and the second semiconductor material layer are staggered to form Z-type energy band arrangement.
  2. 2. The Z-heterojunction based optoelectronic synaptic device of claim 1, wherein the first layer of semiconductor material is (PEA) 2 PbI 4 and the second layer of semiconductor material is SnO 2 .
  3. 3. The Z-heterojunction based optoelectronic synaptic device as claimed in claim 1 or 2 wherein the thickness of the first layer of semiconductor material is 100-300nm and the thickness of the second layer of semiconductor material is 10-100nm.
  4. 4. The optoelectronic synapse device based on Z-heterojunction according to claim 1, wherein the top electrode layer is a metal conductive material layer and the bottom electrode layer is a transparent conductive material layer.
  5. 5. The Z-heterojunction based optoelectronic synaptic device of claim 4, wherein the top electrode layer is made of one of Ag, au and Pt, and the bottom electrode layer is made of one of indium tin oxide, aluminum-doped zinc oxide and graphene.
  6. 6. A method of preparing an optoelectronic synaptic device according to any one of claims 1-5, comprising the steps of: s1, preparing a precursor solution of a first semiconductor material layer; s2, spin coating a second semiconductor material layer on the bottom electrode layer, and annealing and cooling; s3, spin-coating the precursor solution prepared in the step S1 on the second semiconductor material layer, and annealing to form a first semiconductor material layer; and S4, depositing a top electrode layer on the first semiconductor material layer through thermal evaporation.
  7. 7. The method of fabricating an optoelectronic synaptic device according to claim 6, wherein in S3, the spin coating of the precursor solution is performed at a stepwise increasing rotational speed.
  8. 8. A method of implementing bi-directional synaptic function modulation of an optoelectronic synaptic device as claimed in any one of claims 1-5 comprising the steps of: The photo-suppression synaptic function is realized by adopting a photo-stimulation photoelectron synaptic device, wherein photo-generated electrons transferred to the second semiconductor material layer by an external circuit and photo-generated holes in the first semiconductor material layer migrate to the interface of the first semiconductor material layer and the second semiconductor material layer to be composited, meanwhile, oxygen vacancies of the second semiconductor material layer can capture the photo-generated electrons preferentially, so that the compositing of the photo-generated electrons and the photo-generated holes at the interface is unbalanced, and further the photo-generated holes are induced to accumulate, so that the compositing rate of photo-generated carriers is accelerated; The optical excitation synaptic function is realized by adopting the same optical stimulation photoelectron synaptic device as the optical inhibition synaptic function, applying bias voltage to make the Z-type heterojunction functional layer show typical II-type heterojunction carrier separation behavior and utilizing oxygen vacancy in the second semiconductor material layer to capture and release photon generated electrons.
  9. 9. Use of the optoelectronic synapse device of any one of claims 1-5 in an artificial neural network, a neuromorphic computing system, a smart sensor, or an optical computing chip.

Description

Z-type heterojunction-based optoelectronic synaptic device and preparation method and application thereof Technical Field The invention belongs to the technical field of nerve morphology calculation, and particularly relates to a Z-type heterojunction-based photoelectronic synapse device, and a preparation method and application thereof. Background With the rapid development of artificial intelligence and neuromorphic computation, artificial synapse devices simulating biological synaptic function are becoming research hotspots. The photoelectronic synapse device takes light as a stimulation signal, has the advantages of high response speed, high space-time resolution, no electrical crosstalk and the like, and has remarkable potential in large-scale neural network integration. In recent years, a full-optical synaptic system develops multiple technical paths for realizing bidirectional synaptic weight modulation (namely optical stimulus inhibition and optical stimulus enhancement), mainly comprising the following steps of firstly, utilizing wavelength selectivity of an active material, respectively absorbing specific wavelengths through designing a heterogeneous material, exciting light excitation and optical suppression behaviors, secondly, regulating and controlling oxygen vacancy charge states or metal ion valence states by means of different wavelength illumination based on wavelength-dependent redox reactions, realizing bidirectional weight updating, thirdly, structurally integrating a device with optical excitation and optical suppression functions by adopting a series integration strategy, respectively realizing two types of responses by means of ion migration or defect capture-release mechanisms in different functional layers, finally, constructing a three-port transistor structure, regulating and controlling heterojunction energy band arrangement by means of gate voltage, further controlling separation and transportation paths of photo-generated carriers, and finally simulating excitation and suppression functions. However, the problems of dual-wavelength excitation, different device integration and three-terminal device related to the strategy are faced with practical application challenges due to the complex structure, high system integration difficulty, high energy consumption and the like. Disclosure of Invention The invention aims to provide an optoelectronic synaptic device based on Z-type heterojunction, which can at least solve part of defects existing in the prior art. In order to achieve the above purpose, the invention adopts the following technical scheme: the optoelectronic synaptic device based on Z-type heterojunction sequentially comprises a top electrode layer, a Z-type heterojunction functional layer and a bottom electrode layer from top to bottom, wherein the Z-type heterojunction functional layer is formed by tightly contacting a first semiconductor material layer and a second semiconductor material layer, and energy bands of the first semiconductor material layer and the second semiconductor material layer are staggered to form Z-type energy bands. Further, the first semiconductor material layer is (PEA) 2PbI4 and the second semiconductor material layer is SnO 2. Further, the thickness of the first semiconductor material layer is 100-300nm, and the thickness of the second semiconductor material layer is 10-100nm. Further, the top electrode layer is a metal conductive material layer, and the bottom electrode layer is a transparent conductive material layer. Further, the material of the top electrode layer is one of Ag, au and Pt, and the material of the bottom electrode layer is one of indium tin oxide, aluminum-doped zinc oxide and graphene. In addition, the invention also provides a preparation method of the optoelectronic synapse device, which comprises the following steps: s1, preparing a precursor solution of a first semiconductor material layer; s2, spin coating a second semiconductor material layer on the bottom electrode layer, and annealing and cooling; s3, spin-coating the precursor solution prepared in the step S1 on the second semiconductor material layer, and annealing to form a first semiconductor material layer; and S4, depositing a top electrode layer on the first semiconductor material layer through thermal evaporation. Further, in the step S3, the precursor solution is spin-coated in a manner of gradually increasing the rotation speed. The invention also provides a method for realizing the bidirectional synaptic function modulation of the optoelectronic synaptic device, which comprises the following steps: The photo-suppression synaptic function is realized by adopting a photo-stimulation photoelectron synaptic device, wherein photo-generated electrons transferred to the second semiconductor material layer by an external circuit and photo-generated holes in the first semiconductor material layer migrate to the interface of the first semiconductor material layer a