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CN-122028650-A - Superconducting quantum bit, preparation method and superconducting quantum chip

CN122028650ACN 122028650 ACN122028650 ACN 122028650ACN-122028650-A

Abstract

The application discloses a superconducting quantum bit, a preparation method and a superconducting quantum chip. Superconducting qubits include a substrate, a capacitor, and a josephson junction. The substrate is provided with a through hole, the side wall of the through hole is provided with a vertical interconnection structure formed by superconducting materials, and the capacitor comprises a first superconducting electrode and a second superconducting electrode. The first superconducting electrode is provided with a first preset shape and is arranged on the first surface of the substrate, the first superconducting electrode is connected with the vertical interconnection structure, the second superconducting electrode is provided with a second preset shape, the second superconducting electrode is arranged on the second surface of the substrate corresponding to the first superconducting electrode, the second surface is opposite to the first surface, the second superconducting electrode is connected with the vertical interconnection structure, the Josephson junction is arranged on the first surface, one end of the Josephson junction is connected with the first superconducting electrode, and the other end of the Josephson junction is connected with the second superconducting electrode, so that the Josephson junction is connected with the capacitor in parallel.

Inventors

  • FENG YAQING
  • YU HAIFENG
  • ZHANG YINGSHAN

Assignees

  • 北京量子信息科学研究院

Dates

Publication Date
20260512
Application Date
20251230

Claims (11)

  1. 1. A superconducting qubit, comprising: A substrate having a via hole, wherein a side wall of the via hole is provided with a vertical interconnection structure formed by a superconducting material; a capacitor, comprising: a first superconducting electrode having a first preset shape and disposed on the first surface of the substrate, the first superconducting electrode being connected to the vertical interconnection structure; The second superconducting electrode is provided with a second preset shape, is arranged on the second surface of the substrate corresponding to the first superconducting electrode, is arranged opposite to the first surface and is connected with the vertical interconnection structure; And one end of the Josephson junction is connected with the first superconducting electrode, and the other end of the Josephson junction is connected with the second superconducting electrode, so that the Josephson junction is connected with the capacitor in parallel.
  2. 2. The superconducting qubit of claim 1 wherein the first preset shape and the second preset shape are rounded rectangles, the first superconducting electrode and the second superconducting electrode being disposed opposite each other.
  3. 3. The superconducting qubit of claim 1 wherein the first preset shape is annular and the second preset shape is circular, the first superconducting electrode and the second superconducting electrode being coaxially disposed.
  4. 4. The superconducting qubit of claim 1 wherein the material of the first superconducting electrode and the second superconducting electrode is titanium nitride.
  5. 5. The superconducting qubit of claim 1 wherein the substrate is a silicon substrate.
  6. 6. A method of preparing superconducting qubits, comprising: etching the silicon substrate to obtain a through silicon via; growing an insulating layer on the first surface of the silicon substrate, the second surface of the silicon substrate and the side wall of the silicon through hole; Growing superconducting thin film layers on the insulating layer of the first surface of the silicon substrate, the insulating layer of the second surface of the silicon substrate and the insulating layer of the side wall of the silicon through hole respectively, wherein a vertical interconnection structure is formed on the superconducting thin film layers of the silicon through hole; etching the superconducting thin film layer on the second surface of the silicon substrate to obtain a second superconducting electrode which is connected with the vertical interconnection structure and has a second preset shape; etching the superconducting thin film layer on the first surface of the silicon substrate to obtain a first superconducting electrode which is connected with the vertical interconnection structure and has a first preset shape; And preparing a Josephson junction at a preset position of the first surface of the silicon substrate to obtain superconducting qubits.
  7. 7. The method of manufacturing as claimed in claim 6, wherein before the etching treatment is performed on the silicon substrate to obtain the through-silicon via, the method further comprises: preparing a first oxide layer on the first surface of the silicon substrate; the etching treatment is carried out on the silicon substrate to obtain a silicon through hole, which comprises the following steps: Spin-coating a first photoresist on the second surface of the silicon substrate, exposing and developing to obtain a photoresist pattern with a preset through hole shape; etching the silicon substrate under the photoresist pattern with the preset through hole shape to obtain the through silicon hole; and removing the first oxide layer and the first photoresist.
  8. 8. The method of manufacturing according to claim 6, wherein etching the superconducting thin film layer on the second surface of the silicon substrate to obtain a second superconducting electrode connected to the vertical interconnect and having a second predetermined shape, comprises: fixing a first ultraviolet adhesive tape on a first surface of the silicon substrate; spin-coating a second photoresist on the second surface of the silicon substrate, exposing and developing to obtain a photoresist pattern with a second preset shape; Etching the superconducting thin film layer on the second surface of the silicon substrate under the photoresist pattern with the second preset shape to obtain a second superconducting electrode which is connected with the vertical interconnection structure and has the second preset shape; and removing the second photoresist and the first ultraviolet adhesive tape.
  9. 9. The method of manufacturing according to claim 7, wherein etching the superconducting thin film layer on the first surface of the silicon substrate to obtain a first superconducting electrode connected to the vertical interconnect and having a first predetermined shape, comprises: Fixing a second ultraviolet adhesive tape on a second surface of the silicon substrate; Spin-coating a third photoresist on the first surface of the silicon substrate, exposing and developing to obtain a photoresist pattern with the first preset shape; Etching the superconducting thin film layer on the first surface of the silicon substrate under the photoresist pattern with the first preset shape to obtain a first superconducting electrode which is connected with the vertical interconnection structure and has the first preset shape; And removing the third photoresist and the second ultraviolet adhesive tape.
  10. 10. The method of manufacturing according to claim 9, wherein the first preset shape and the second preset shape are rounded rectangles, or the first preset shape is a ring shape and the second preset shape is a circle shape.
  11. 11. A superconducting quantum chip comprising the superconducting qubit of any one of claims 1-5.

Description

Superconducting quantum bit, preparation method and superconducting quantum chip Technical Field The application relates to the technical field of superconducting quantum computing chips, in particular to a superconducting quantum bit, a preparation method and a superconducting quantum chip. Background Superconducting qubits are the leading system to realize large-scale quantum processors, and have been deployed in some of the most complex quantum processors in recent years to demonstrate quantum error correction, quantum multi-body physics and entanglement dynamics, and quantum simulation. Among all types of superconducting qubits, transmon is the most widely used qubit, because it has advantages of good coherence, easy coupling and readout, etc. The basic structure of Transmon includes a superconducting Josephson junction (Al-AlOx-Al) and a capacitor in parallel with the superconducting Josephson junction. During the preparation of Transmon, various microscopic defects are introduced that exist around and interact with the bits, destroying the coherence of the bits. Among these defects, one major class of defects arises from the two-level system (TLS) formed in the dielectric and/or insulating layers, resulting in higher dielectric losses. At the same time, the high dielectric loss of the chip is mainly due to uncontrolled surfaces, interfaces (such as MA, MS, SA) and contaminants. For example, planar tranmon as shown in fig. 1a, the two electrodes of planar tranmon are disposed on the same surface of the substrate. The electric field distribution between the two electrodes is shown in fig. 1b, and the electric field is shown by the black arrow in fig. 1b, and the electric field is more distributed at the MA/SA interface, so that higher dielectric loss is caused. The matters in the background section are only those known to the public and do not, of course, represent prior art in the field. Disclosure of Invention According to one aspect of the application, a superconducting qubit is provided. Superconducting qubits include a substrate, a capacitor, and a josephson junction. The substrate is provided with a through hole, the side wall of the through hole is provided with a vertical interconnection structure formed by superconducting materials, and the capacitor comprises a first superconducting electrode and a second superconducting electrode. The first superconducting electrode is provided with a first preset shape and is arranged on the first surface of the substrate, the first superconducting electrode is connected with the vertical interconnection structure, the second superconducting electrode is provided with a second preset shape, the second superconducting electrode is arranged on the second surface of the substrate corresponding to the first superconducting electrode, the second surface is opposite to the first surface, the second superconducting electrode is connected with the vertical interconnection structure, the Josephson junction is arranged on the first surface, one end of the Josephson junction is connected with the first superconducting electrode, and the other end of the Josephson junction is connected with the second superconducting electrode, so that the Josephson junction is connected with the capacitor in parallel. According to some embodiments of the application, the first preset shape and the second preset shape are rounded rectangles, and the first superconducting electrode and the second superconducting electrode are disposed opposite to each other. According to some embodiments of the application, the first preset shape is annular and the second preset shape is circular, the first superconducting electrode and the second superconducting electrode being coaxially arranged. According to some embodiments of the application, the material of the first and second superconducting electrodes is titanium nitride. According to some embodiments of the application, the substrate is a silicon substrate. According to one aspect of the application, a method of preparing superconducting qubits is provided. The preparation method comprises the steps of carrying out etching treatment on a silicon substrate to obtain a silicon through hole, growing insulating layers on a first surface of the silicon substrate, a second surface of the silicon substrate and the side wall of the silicon through hole, respectively growing superconducting thin film layers on the insulating layers on the first surface of the silicon substrate, the second surface of the silicon substrate and the side wall of the silicon through hole, wherein a vertical interconnection structure is formed on the superconducting thin film layers of the silicon through hole, carrying out etching treatment on the superconducting thin film layers on the second surface of the silicon substrate to obtain a second superconducting electrode which is connected with the vertical interconnection structure and has a second preset shape, carrying out