CN-122028700-A - Test structure and test method
Abstract
The structure comprises a substrate, a device to be tested, a heating device and a heating device, wherein the substrate comprises a chip area and a region to be tested, the device to be tested is located above the substrate of the region to be tested, the heating device is located above the substrate of the region to be tested and surrounds the device to be tested, and the heating device and the device to be tested are exposed out of the top of the chip area. By providing a heating device surrounding the device under test, the reliability of the test structure is improved and the flexibility of electromigration reliability testing is increased.
Inventors
- ZHAO DANYANG
- GUAN WEIMING
- YAN SHEN
- DAI SHAOLONG
- LI QIANG
- LIU YONGJIE
- YANG TAO
Assignees
- 中芯南方集成电路制造有限公司
- 中芯国际集成电路制造(上海)有限公司
Dates
- Publication Date
- 20260512
- Application Date
- 20241104
Claims (15)
- 1. A test structure, comprising: The substrate comprises a chip area and a to-be-detected area; the device to be tested is positioned above the substrate of the region to be tested; And the heating device is positioned above the substrate of the region to be tested and surrounds the device to be tested, and the heating device and the device to be tested are exposed out of the top of the chip region.
- 2. The test structure of claim 1, wherein the heating device comprises a plurality of metal layers disposed in a stack in a longitudinal direction, and wherein the plurality of metal layers surrounds the device under test.
- 3. The test structure of claim 2, wherein the metal layer comprises sub-metal lines extending in a first direction and arranged in parallel at intervals along a second direction, and wherein the first direction is perpendicular to the second direction.
- 4. The test structure of claim 3, wherein the sub-metal lines of the same layer are spaced apart in the second direction by a distance of 36 nm to 540 nm.
- 5. The test structure of claim 3, wherein a length of the sub-metal lines in the first direction is the same as a length of the device under test in the first direction.
- 6. The test structure of claim 2, wherein the metal layer on the side of the device under test is on the same layer as the device under test.
- 7. The test structure of claim 6, wherein the direction of extension of the metal layer at the same layer as the device under test is the same as the direction of extension of the device under test.
- 8. The test structure of claim 6, wherein the metal layer on the same layer as the device under test is spaced apart from the device under test by a distance of 20 nm to 500 nm.
- 9. The test structure of claim 1, further comprising a first interconnect via structure at both ends of the device under test, the first interconnect via structure being electrically connected to the device under test; And the second interconnection through hole structure is positioned at two end parts of the heating device and is electrically connected with the heating device.
- 10. The test structure of claim 1, wherein the material of the heating device comprises one or more of copper, aluminum, tungsten, and cobalt.
- 11. The test structure of claim 1, wherein the device under test comprises a metal line under test.
- 12. The test structure of claim 1, further comprising an active device located above the substrate of the chip area.
- 13. A method of testing, comprising: providing a test structure according to any one of claims 1 to 12; Heating the device to be tested through the heating device; and after the device to be tested is heated, obtaining the electromigration reliability of the device to be tested.
- 14. The method of testing of claim 13, wherein the test structure further comprises a second interconnect via structure located at both ends of the heating device, and the second interconnect via structure is electrically connected to the heating device; the step of heating the device to be tested through the heating device comprises the steps of setting a first voltage loading line electrically connected with the second interconnection through hole structure, and continuously applying voltage to the heating device through the first voltage loading line.
- 15. The method of testing of claim 13, wherein the test structure further comprises a first interconnect via structure located at both ends of the device under test, and the first interconnect via structure is electrically connected to the device under test; The method for obtaining the electromigration reliability of the device to be tested comprises the steps of setting a first current loading line electrically connected with the first interconnection through hole structure, setting a second voltage loading line electrically connected with the first interconnection through hole structure, applying a fixed current value to the device to be tested through the first current loading line, obtaining voltage values at two ends of the device to be tested through the second voltage loading line after applying current to the device to be tested, and obtaining the resistance value of the device to be tested based on the voltage values and the fixed current value, wherein the change of the resistance value is used for representing the electromigration reliability of the device to be tested.
Description
Test structure and test method Technical Field The embodiment of the invention relates to the field of semiconductor manufacturing, in particular to a test structure and a test method. Background EM testing, i.e., electromigration testing (Electromigration Testing), is an important means of evaluating the reliability of integrated circuits. Such tests are mainly focused on the action force of electron flow on metal atoms under high current density, which may cause metal wires to form voids or hillocks, and finally cause open circuit or short circuit, which affects the normal operation of the chip. EM testing is a destructive experiment, meaning that the testing process may result in sample damage and therefore failure to perform other types of testing after testing. In performing EM testing, it is generally required to perform after wafer dicing (WAFER DIE SAW). Wafer dicing is the process of dividing a wafer into individual chips (die), a step in the semiconductor packaging process, after which the dice are placed into special test boxes. In order to accelerate the test process and obtain reliability data in a short time, EM tests are typically performed under severe conditions including application of high current and high temperature to accelerate the occurrence of electromigration phenomena, thereby simulating the failure of the chip over a long period of use. However, due to the destructive nature of EM testing, the reliability and flexibility of EM testing remains to be improved. Disclosure of Invention The embodiment of the invention solves the problem of providing a test structure and a test method, which are beneficial to improving the reliability and the test flexibility of the test structure. In order to solve the problems, the embodiment of the invention provides a test structure, which comprises a substrate, a device to be tested, a heating device and a heating device, wherein the substrate comprises a chip area and a region to be tested, the device to be tested is positioned above the substrate of the region to be tested, the heating device is positioned above the substrate of the region to be tested and surrounds the device to be tested, and the heating device and the device to be tested are exposed out of the top of the chip area. Optionally, the heating device includes a plurality of metal layers stacked in a longitudinal direction, and the plurality of metal layers surrounds the device under test. Optionally, the metal layer includes sub-metal lines extending along a first direction and arranged in parallel along a second direction at intervals, and the first direction is perpendicular to the second direction. Optionally, the sub-metal lines of the same layer are spaced apart in the second direction by a distance of 36 nm to 540 nm. Optionally, the length of the sub-metal line in the first direction is the same as the length of the device under test in the first direction. Optionally, the metal layer located at the side of the device to be tested is located at the same layer as the device to be tested. Optionally, the extending direction of the metal layer in the same layer as the device to be tested is the same as the extending direction of the device to be tested. Optionally, a distance between a metal layer on the same layer as the device under test and the device under test is 20nm to 500 nm. Optionally, the test structure further comprises a first interconnection through hole structure which is positioned at two ends of the device to be tested and is electrically connected with the device to be tested, and a second interconnection through hole structure which is positioned at two ends of the heating device and is electrically connected with the heating device. Optionally, the material of the heating device includes one or more of copper, aluminum, tungsten, and cobalt. Optionally, the device under test includes a metal line under test. Optionally, the test structure further includes an active device located over the substrate of the chip region. Correspondingly, the embodiment of the invention also provides a testing method, which comprises the steps of providing the testing structure provided by the invention, heating the device to be tested through the heating device, and obtaining electromigration reliability of the device to be tested after heating the device to be tested. Optionally, the test structure further comprises a second interconnection through hole structure which is positioned at two end parts of the heating device and is electrically connected with the heating device, and the step of heating the device to be tested through the heating device comprises the steps of setting a first voltage loading line which is electrically connected with the second interconnection through hole structure and continuously applying voltage to the heating device through the first voltage loading line. The test structure comprises a first interconnection through hole structure, a first curre