CN-122028719-A - Semiconductor structure and preparation method thereof

Abstract

The application discloses a semiconductor structure and a preparation method thereof, and relates to the technical field of semiconductors. The preparation method comprises the steps of forming a laminated structure on a substrate, wherein the laminated structure comprises a grinding stop layer and a mask layer which are arranged in a laminated mode, the mask layer is located on one side, far away from the substrate, of the grinding stop layer, forming an isolation groove in the laminated structure, penetrating through the laminated structure and extending into the substrate, filling the isolation groove to form an isolation material layer, extending the isolation material layer to the top surface, far away from the substrate, of the laminated structure, grinding the mask layer and the isolation material layer by adopting a chemical mechanical grinding process until the grinding stop layer is exposed, forming an initial isolation structure formed by the residual isolation material layer, enabling the initial isolation structure to be away from the top surface of the substrate and enabling the grinding stop layer to be flush with the top surface, far away from the substrate, of the initial isolation structure, removing the grinding stop layer, and forming the isolation structure formed by the residual initial isolation structure. The reliability of the semiconductor structure is improved.

Inventors

• LI FEI
• Dong Zongtou

Assignees

• 合肥晶合集成电路股份有限公司

Dates

Publication Date

20260512

Application Date

20260416

Claims (10)

1. 1. A method of fabricating a semiconductor structure, comprising: Forming a laminated structure on a substrate, wherein the laminated structure comprises a grinding stop layer and a mask layer which are arranged in a laminated manner, and the mask layer is positioned on one side of the grinding stop layer away from the substrate; Forming an isolation trench in the laminated structure, wherein the isolation trench penetrates through the laminated structure and extends into the substrate; Filling the isolation trench to form an isolation material layer, wherein the isolation material layer extends to the top surface of the laminated structure far away from the substrate; Grinding the mask layer and the isolation material layer by adopting a chemical mechanical grinding process until the grinding stop layer is exposed to form an initial isolation structure formed by the rest isolation material layer, wherein the initial isolation structure is away from the top surface of the substrate and the grinding stop layer is away from the top surface of the substrate; And removing the grinding stop layer and the initial isolation structure which is the same layer as the grinding stop layer to form an isolation structure formed by the rest of the initial isolation structure.
2. 2. The method of claim 1, wherein forming a laminate structure on a substrate comprises: forming a silicon oxynitride material on the substrate to form the polish stop layer; and forming a mask layer on the top surface of the silicon oxynitride material away from the substrate.
3. 3. The method according to claim 2, wherein, the forming of the silicon oxynitride material on the substrate to form the polish stop layer comprises: Forming a silicon oxide layer on the substrate; and annealing the silicon oxide layer in a nitrogen atmosphere to form the grinding stop layer.
4. 4. The method of claim 2, wherein filling the isolation trench with the isolation material layer comprises: and filling a silicon oxide material in the isolation groove to form the isolation material layer.
5. 5. The method of claim 1, wherein the chemical mechanical polishing process polishes the isolation material layer at a polishing rate equal to a polishing rate of the mask layer.
6. 6. The method of claim 5, wherein the mask layer is made of the same material as the isolation material layer.
7. 7. The method of claim 1, wherein said removing said polish stop layer and said initial isolation structure on the same layer as said polish stop layer comprises: removing the grinding stop layer and the initial isolation structure on the same layer as the grinding stop layer by adopting an etching process to form the isolation structure; The etching process etches the grinding stop layer at the same speed as the etching of the initial isolation structure.
8. 8. The method of claim 7, wherein the polish stop layer and the initial isolation structure on the same layer as the polish stop layer are removed using a dry etching process.
9. 9. The method of manufacturing according to claim 1, wherein a top surface of the layer of spacer material remote from the substrate is higher than a top surface of the stacked structure remote from the substrate.
10. 10. A semiconductor structure produced by the production method according to any one of claims 1 to 9.

Description

Semiconductor structure and preparation method thereof Technical Field The embodiment of the disclosure relates to the technical field of semiconductors, in particular to a semiconductor structure and a preparation method thereof. Background In the prior art, before etching a trench filled with a shallow trench isolation structure (Shallow Trench Isolation, STI), a silicon nitride layer is deposited on a substrate, and is used as a mask layer for pattern transfer and an etching stop layer for a subsequent chemical mechanical polishing process, after etching and the chemical mechanical polishing process, the mask layer of the silicon nitride material is removed, at this time, an isolation material in the trench, which is used as the shallow trench isolation structure, protrudes out of the substrate, has a protruding portion higher than an active region in the substrate and a pad oxide layer (pad oxide) on the surface of the substrate, and in the process of removing the substrate oxide layer by adopting a wet etching process, the protruding portion is subjected to transverse and vertical bidirectional etching, the etching rate is higher than that of other positions, and a recess (divot) is easily formed at the edge of the shallow trench isolation structure, so that the performance of a semiconductor device is affected. Disclosure of Invention The embodiment of the disclosure provides a semiconductor structure and a preparation method thereof, which can optimize a shallow trench isolation structure and improve the performance of a semiconductor device. A method of fabricating a semiconductor structure, comprising: Forming a laminated structure on a substrate, wherein the laminated structure comprises a grinding stop layer and a mask layer which are arranged in a laminated manner, and the mask layer is positioned on one side of the grinding stop layer away from the substrate; Forming an isolation trench in the laminated structure, wherein the isolation trench penetrates through the laminated structure and extends into the substrate; Filling the isolation trench to form an isolation material layer, wherein the isolation material layer extends to the top surface of the laminated structure far away from the substrate; Grinding the mask layer and the isolation material layer by adopting a chemical mechanical grinding process until the grinding stop layer is exposed to form an initial isolation structure formed by the rest isolation material layer, wherein the initial isolation structure is away from the top surface of the substrate and the grinding stop layer is away from the top surface of the substrate; And removing the grinding stop layer and the initial isolation structure which is the same layer as the grinding stop layer to form an isolation structure formed by the rest of the initial isolation structure. In one embodiment, the forming a stacked structure on a substrate includes: forming a silicon oxynitride material on the substrate to form the polish stop layer; and forming a mask layer on the top surface of the silicon oxynitride material away from the substrate. In one embodiment, the forming a silicon oxynitride material on the substrate comprises: Forming a silicon oxide layer on the substrate; and annealing the silicon oxide layer in a nitrogen atmosphere to form the grinding stop layer. In one embodiment, the filling the isolation trench to form an isolation material layer includes: and filling a silicon oxide material in the isolation groove to form the isolation material layer. In one embodiment, the chemical mechanical polishing process polishes the isolation material layer at a polishing rate equal to a polishing rate of the mask layer. In one embodiment, the mask layer is made of the same material as the isolation material layer. In one embodiment, the removing the polish stop layer, and the initial isolation structure co-layer with the polish stop layer, comprises: removing the grinding stop layer and the initial isolation structure on the same layer as the grinding stop layer by adopting an etching process to form the isolation structure; The etching process etches the grinding stop layer at the same speed as the etching of the initial isolation structure. In one embodiment, the polish stop layer is removed using a dry etch process, and the initial isolation structure is co-layer with the polish stop layer. In one embodiment, the top surface of the layer of isolation material remote from the substrate is higher than the top surface of the stack structure remote from the substrate. A semiconductor structure is prepared by the preparation method. The unexpected technical effects that the application can produce are: in the semiconductor structure and the preparation method thereof, the mask layer and the isolation material layer corresponding to the mask layer are removed by adopting the one-step chemical mechanical polishing process, so that the initial isolation structure is obtained, the mask