CN-122028729-A - Film package, semiconductor module including the same, and display device including the same

Abstract

Provided are a film package, a semiconductor module, and a display device. The semiconductor module includes a film package and a printed circuit board connected to a first surface of the film package. The film package includes a base film, a semiconductor chip on a first surface of the base film, and a first conductive pattern on the first surface of the base film. The first conductive pattern includes a first circuit pattern and a first dummy pattern. The first dummy pattern is spaced apart from the first circuit pattern and is located between the first surface of the base film and the printed circuit board.

Inventors

• CAO SHENGXUAN
• ZHENG ZAIMIN
• Cao Menyou
• HE ZHENGGUI

Assignees

• 三星电子株式会社

Dates

Publication Date

20260512

Application Date

20250715

Priority Date

20241107

Claims (20)

1. 1. A semiconductor module, the semiconductor module comprising: Film encapsulation, and A printed circuit board connected to the film package, Wherein the film package comprises: A base film; a semiconductor chip on the first surface of the base film, and A first conductive pattern on the first surface of the base film, Wherein the first conductive pattern includes a first circuit pattern and a first dummy pattern, and Wherein the first dummy pattern is spaced apart from the first circuit pattern, and the first dummy pattern is located between the first surface of the base film and the printed circuit board.
2. 2. The semiconductor module of claim 1, wherein the first circuit pattern includes a first external terminal and a second external terminal, Wherein the first external terminal is adjacent to a first end of the film package in a first direction, Wherein the second external terminal is adjacent to a second end of the film package opposite the first end of the film package in the first direction, and Wherein the first external terminal is disposed between the first dummy pattern and the first circuit pattern.
3. 3. The semiconductor module of claim 2, wherein the first and second external terminals each comprise a plurality of individual conductive layers having an elongated shape, Wherein the line width, pitch or spacing of the plurality of individual conductive layers included in the first external terminal is greater than the line width, pitch or spacing of the plurality of individual conductive layers included in the second external terminal, or Wherein a distance between the semiconductor chip and the second external terminal is greater than a distance between the semiconductor chip and the first external terminal in the first direction.
4. 4. The semiconductor module of claim 1, wherein the first dummy pattern is electrically isolated from the first circuit pattern, and Wherein the first dummy pattern forms a heat dissipation path to the printed circuit board.
5. 5. The semiconductor module of claim 1, wherein the first dummy pattern is connected directly to the printed circuit board or connected to the printed circuit board via an adhesive layer.
6. 6. The semiconductor module of claim 1, wherein the first dummy pattern comprises a same material as that of the first circuit pattern, and the first dummy pattern is located on a same layer as the first circuit pattern.
7. 7. The semiconductor module of claim 1, further comprising: A circuit region provided with the first circuit pattern and a dummy region provided with the first dummy pattern, and A second dummy pattern on a second surface of the base film, the second surface of the base film being opposite to the first surface of the base film, and the second dummy pattern vertically overlapping at least a portion of the dummy region.
8. 8. The semiconductor module of claim 7, further comprising: and a through-via connector located in the dummy region and penetrating the base film and connected to the first dummy pattern and the second dummy pattern.
9. 9. The semiconductor module of claim 7, wherein the second dummy pattern vertically overlaps at least a portion of the circuit region.
10. 10. A display device, the display device comprising: Film encapsulation; a printed circuit board connected to the film package, and A display panel connected to the film package, Wherein the film package includes a base film, a semiconductor chip on a first surface of the base film facing the printed circuit board or the display panel, and a first conductive pattern on the first surface of the base film, Wherein the first conductive pattern includes a first circuit pattern and a first dummy pattern, and Wherein the first dummy pattern is spaced apart from the first circuit pattern, and the first dummy pattern is located between the first surface of the base film and the printed circuit board.
11. 11. A film package, the film package comprising: A base film; a semiconductor chip on the first surface of the base film, and A first conductive pattern on the first surface of the base film, Wherein the first conductive pattern includes: A first circuit pattern located in a circuit region, wherein the first circuit pattern includes a first external terminal located at a first end of the circuit region in a first direction and a second external terminal located at a second end of the circuit region opposite to the first end in the first direction, and A first dummy pattern located in a dummy region, the dummy region being located outside the circuit region in the first direction, and the first dummy pattern being electrically isolated from the first circuit pattern and the semiconductor chip.
12. 12. The film package of claim 11, wherein the first external terminal is disposed between the dummy region and the first end of the circuit region.
13. 13. The film package of claim 12, wherein the first and second external terminals each comprise a plurality of individual conductive layers having an elongated shape, Wherein the line width, pitch or spacing of the plurality of individual conductive layers included in the first external terminal is greater than the line width, pitch or spacing of the plurality of individual conductive layers included in the second external terminal, or Wherein a distance between the semiconductor chip and the second external terminal is greater than a distance between the semiconductor chip and the first external terminal in the first direction.
14. 14. The film package of claim 11, wherein the first dummy pattern comprises a same material as that of the first circuit pattern and the first dummy pattern is located on a same layer as the first circuit pattern.
15. 15. The film package of claim 11, further comprising: a second dummy pattern on a second surface of the base film, the second surface of the base film being opposite to the first surface of the base film, and the second dummy pattern vertically overlapping at least a portion of the dummy region.
16. 16. The film package of claim 15, further comprising: and a through-via connector located in the dummy region and penetrating the base film and connected to the first dummy pattern and the second dummy pattern.
17. 17. The film package of claim 15, wherein the second dummy pattern vertically overlaps at least a portion of the circuit region.
18. 18. The film package of claim 11, wherein the first dummy pattern is configured to have a shape that is asymmetric in the first direction.
19. 19. The film package of claim 11, wherein the first dummy pattern has a line shape or a bar shape extending in a second direction intersecting the first direction.
20. 20. The film package of claim 11, wherein a first width of the first dummy pattern in the first direction is greater than a width of the first external terminal in the first direction or a width of the second external terminal in the first direction, or Wherein the first width of the first dummy pattern in the first direction is greater than a distance between the semiconductor chip and the first external terminal in the first direction.

Description

Film package, semiconductor module including the same, and display device including the same Technical Field The present disclosure relates to a film package, a semiconductor module and a display device including the film package, and a method of manufacturing the film package. Background Semiconductor devices can have a small size while performing various functions, and thus are widely used in various electronic industries. As the electronic industry advances, research into packaging techniques capable of reducing the size of semiconductor devices while improving the performance of the semiconductor devices is ongoing. If a large amount of heat is generated in the semiconductor chip included in the film package, the performance of the semiconductor chip may be deteriorated or the semiconductor chip may malfunction. Accordingly, research into a film package capable of effectively dissipating heat generated in a semiconductor chip is being continued. Disclosure of Invention The present disclosure is intended to provide a film package capable of enhancing performance, a semiconductor module and a display device including the film package, and a method of manufacturing the film package capable of improving performance and productivity. A semiconductor module according to an embodiment includes a film package and a printed circuit board connected to a first surface of the film package. The film package includes a base film, a semiconductor chip located on the first surface of the base film, and a first conductive pattern located on the first surface of the base film. The first conductive pattern includes a first circuit pattern and a first dummy pattern. The first dummy pattern is spaced apart from the first circuit pattern and is located between the first surface of the base film and the printed circuit board. A display device according to an embodiment includes a film package, a printed circuit board connected to the film package, and a display panel connected to the film package. The film package includes a base film, a semiconductor chip on a first surface of the base film facing the printed circuit board or the display panel, and a first conductive pattern on the first surface of the base film. The first conductive pattern includes a first circuit pattern and a first dummy pattern. The first dummy pattern is spaced apart from the first circuit pattern and is located between the first surface of the base film and the printed circuit board. A film package according to an embodiment includes a base film, a semiconductor chip located on a first surface of the base film, and a first conductive pattern located on the first surface of the base film. The first conductive pattern includes a first circuit pattern and a first dummy pattern. The first circuit pattern is located in the circuit region. The first circuit pattern includes a first external terminal located at a first end of the circuit region in a first direction and a second external terminal located at a second end of the circuit region opposite the first end in the first direction. A first dummy pattern is located in a dummy region, the dummy region being located outside the circuit region in the first direction, and the first dummy pattern being electrically isolated from the first circuit pattern and the semiconductor chip. The manufacturing method of the film package according to the embodiment includes forming a first photoresist pattern on a first surface of a base film, forming a first metal layer in a region other than a region including the first photoresist pattern on the first surface of the base film, and removing the first photoresist pattern. The first photoresist pattern exposes a region of the first surface of the base film where the first circuit pattern and the first heat dissipation pattern are disposed. The first metal layer includes at least a portion of the first circuit pattern and the first heat dissipation pattern. The manufacturing method of the film package according to the embodiment includes forming a first photoresist pattern on a first surface of a base film, wherein the first photoresist pattern exposes a region of the first surface of the base film where a first circuit pattern and a first heat dissipation pattern are disposed, forming a first metal layer in a region other than the region including the first photoresist pattern on the first surface of the base film, wherein the first metal layer includes at least a portion of the first circuit pattern and the first heat dissipation pattern, and removing the first photoresist pattern. The method further includes forming a second heat dissipation pattern on a second surface of the base film opposite to the first surface of the base film. The method further includes forming a second photoresist pattern on the second surface of the base film, wherein the second photoresist pattern exposes at least a region provided with a second heat dissipation pattern, forming a second meta