CN-122028736-A - Semiconductor device and preparation method thereof

CN122028736ACN 122028736 ACN122028736 ACN 122028736ACN-122028736-A

Abstract

The application discloses a semiconductor device and a preparation method thereof, and relates to the technical field of semiconductors. The temperature sensor comprises a channel layer, a first insulating layer, a second insulating layer, a barrier layer, a source electrode, a grid electrode and a drain electrode, wherein the first surface of the insulating layer is arranged on the channel layer, the surface of the barrier layer, which is far away from the insulating layer, is arranged on the surface of the barrier layer, which is far away from the channel layer, the source electrode, the grid electrode and the drain electrode are arranged at intervals, the region between the grid electrode and the drain electrode comprises a first region and a second region surrounding the first region, an isolation structure is arranged between the first region and the second region, the isolation structure extends from the surface of the barrier layer, which is far away from the channel layer, to the insulating layer, and the first region comprises a diode structure which is in thermal contact with the channel layer and is used for detecting the temperature of the channel layer. The application improves the accuracy of monitoring the junction temperature of the semiconductor device by arranging the diode structure in thermal contact with the channel layer in the first region of the semiconductor device and arranging the isolation structure between the first region and the second region.

Inventors

ZHOU YUGANG
WANG PENGLIN
TANG FAQUAN
CHEN DUNJUN
ZHANG RONG

Assignees

南京大学

Dates

Publication Date: 20260512
Application Date: 20260213

Claims (10)

1. A semiconductor device, comprising: an insulating layer having oppositely disposed first and second surfaces; a channel layer located on the first surface of the insulating layer; A barrier layer positioned on a surface of the channel layer on a side away from the insulating layer; a source electrode, a grid electrode and a drain electrode are sequentially arranged on the surface of one side of the barrier layer, which is far away from the channel layer, and the grid electrode, the source electrode and the drain electrode are all arranged at intervals; The region between the gate and the drain electrode comprises a first region and a second region surrounding the first region, and an isolation structure is arranged between the first region and the second region and extends from one side surface of the barrier layer away from the channel layer to the insulating layer; Wherein the first region includes a diode structure in thermal contact with the channel layer for detecting a temperature of the channel layer.
2. The semiconductor device of claim 1, wherein the diode structure is a schottky diode; the first region is provided with the channel layer and the barrier layer; And a first electrode and a second electrode are arranged on the surface of the barrier layer in the first region, schottky contact is formed between the first electrode and the barrier layer, and ohmic contact is formed between the second electrode and the barrier layer.
3. The semiconductor device according to claim 2, wherein the barrier layer has a first thickness in the first region; In the second region, the barrier layer has a second thickness; the first thickness is less than the second thickness.
4. The semiconductor device of claim 1, wherein the diode structure comprises a PN junction diode; The first region is provided with a groove, the groove exposes the channel layer, a first semiconductor block and a second semiconductor block with PN junctions are filled in the groove, the first semiconductor block and the second semiconductor block are arranged in a direction parallel to the plane where the channel layer is located, a first electrode is arranged on the surface of one side, facing away from the channel layer, of the first semiconductor block, and a second electrode is arranged on the surface of one side, facing away from the channel layer, of the second semiconductor structure.
5. The semiconductor device of claim 1, wherein the semiconductor device has a first region, the first region being spaced from the gate by a distance less than the distance from the drain.
6. The semiconductor device of claim 5, wherein a diode structure is centered in the gate length direction.
7. The semiconductor device according to claim 1, wherein the second region has a plurality of the first regions disposed at intervals therein, the diode structures are disposed in the first regions, and the diode structures in different ones of the first regions are used to detect a temperature of the channel layer unused portion.
8. A method of manufacturing a semiconductor device, comprising: Forming an insulating layer having a first surface and a second surface disposed opposite each other; forming a channel layer on the first surface of the insulating layer; Forming a barrier layer on the surface of one side of the channel layer far away from the insulating layer; forming a source electrode, a gate electrode and a drain electrode on the surface of the barrier layer away from the channel layer, wherein the gate electrode is positioned between the source electrode and the drain electrode; forming an isolation structure extending from a side surface of the barrier layer away from the channel layer to the insulating layer and located between the first region and the second region; And forming a diode structure in thermal contact with the channel layer in the first region for detecting the temperature of the channel layer.
9. The method of manufacturing of claim 8, wherein forming the diode structure comprises: A first electrode and a second electrode are formed on the surface of the barrier layer in the first region, schottky contact is formed between the first electrode and the barrier layer, and ohmic contact is formed between the second electrode and the barrier layer.
10. The method of manufacturing of claim 8, wherein after forming the diode structure, the method of manufacturing further comprises: And forming passivation layers on the surfaces of the barrier layer and the isolation structure.

Description

Semiconductor device and preparation method thereof Technical Field The application relates to the technical field of semiconductors, in particular to a semiconductor device and a preparation method thereof. Background As a representative of the third generation semiconductor material, gaN has excellent characteristics of high breakdown electric field, high thermal conductivity, high temperature stability, and the like. High electron mobility transistors (High Electron Mobility Transistor, simply referred to as HEMTs) based on GaN have become a revolutionary technology for the next generation of power electronics systems. GaN HEMTs can achieve high electron mobility in excess of 2000 cm 2/v·s due to polarization effects at the heterointerface to produce two-dimensional electron gas. However, as power consumption increases, the self-heating effect of the device becomes significant, exacerbating adverse effects on performance and reliability, light weight may cause degradation of the device in on-resistance, drain current, etc., and heavy weight may cause hard breakdown and thermal failure of the device. Therefore, accurate real-time monitoring of the junction temperature of the device has become a key link for reliability analysis and thermal management of the GaN HEMT. At present, the temperature monitoring is carried out through a gate source electrode inherent to an HEMT device in the prior art, but the method relies on the rapid switching of a test circuit, so that measurement delay is inevitably introduced, result errors are caused, and the application requirement for accurately monitoring the junction temperature of the device is difficult to meet. Disclosure of Invention In view of the above problems, the present application provides a semiconductor device and a method for manufacturing the same, so as to achieve the purpose of improving the accuracy of monitoring the junction temperature of the semiconductor device. The specific scheme is as follows: in one aspect, the present application provides a semiconductor device including an insulating layer, a channel layer, and a barrier layer. The insulating layer is provided with a first surface and a second surface which are oppositely arranged; The channel layer is positioned on the first surface of the insulating layer; the barrier layer is positioned on the surface of one side of the channel layer, which is far away from the insulating layer; The surface of one side of the barrier layer, which is far away from the channel layer, is sequentially provided with a source electrode, a grid electrode and a drain electrode, wherein the grid electrode, the source electrode and the drain electrode are all arranged at intervals; the region between the grid electrode and the drain electrode comprises a first region and a second region surrounding the first region, an isolation structure is arranged between the first region and the second region, and the isolation structure extends from one side surface of the barrier layer away from the channel layer to the insulating layer; wherein the first region comprises a diode structure in thermal contact with the channel layer for detecting a temperature of the channel layer. In some embodiments, the diode structure is a schottky diode; The first region is provided with a channel layer and a barrier layer; In the first region, a first electrode and a second electrode are arranged on the surface of the barrier layer, schottky contact is formed between the first electrode and the barrier layer, and ohmic contact is formed between the second electrode and the barrier layer. In some embodiments, the barrier layer has a first thickness in the first region; in the second region, the barrier layer has a second thickness; the first thickness is less than the second thickness. In some embodiments, the diode structure includes a PN junction diode; The first region is provided with a groove, the groove exposes out of the channel layer, a first semiconductor block and a second semiconductor block with PN junctions are filled in the groove, the first semiconductor block and the second semiconductor block are arranged in the direction parallel to the plane of the channel layer, a first electrode is arranged on the surface of one side, facing away from the channel layer, of the first semiconductor block, and a second electrode is arranged on the surface of one side, facing away from the channel layer, of the second semiconductor structure. In some embodiments, the semiconductor device has a first region, a distance between the first region and the gate electrode being smaller than a distance between the first region and the drain electrode. In some embodiments, the diode structure is centered in the gate length direction. In some embodiments, the second region is provided with a plurality of first regions arranged at intervals, and diode structures are arranged in the first regions, and the diode structures in different first regions a