CN-122028748-A - Metal substrate power device package

Abstract

The metal substrate power device package comprises a power transistor wafer, wherein a drain electrode pad is arranged on the bottom surface of the power transistor wafer, a source electrode pad and a switch control electrode pad are arranged on the top surface of the power transistor wafer, an L-shaped metal substrate is further arranged, one side of the L-shaped metal substrate is small in thickness, the power transistor wafer is welded on the top surface of the side of the L-shaped metal substrate, which is small in thickness, through the drain electrode pad, and insulating rubber materials are filled around the power transistor wafer. The L-shaped metal substrate is used as a drain electrode conducting pole piece, a packaged drain electrode bonding pad, a packaged radiating fin and a packaged substrate of the power transistor wafer at the same time, so that high-cost performance high-power transistor packaging is realized.

Inventors

• ZHAO ZHENTAO

Assignees

• 摩驱科技(深圳)有限公司

Dates

Publication Date

20260512

Application Date

20250312

Claims (2)

1. 1. A metal substrate power device package is characterized by comprising a power transistor wafer, wherein a drain electrode bonding pad is arranged on the bottom surface of the power transistor wafer, a source electrode bonding pad and a switch control electrode bonding pad are arranged on the top surface of the power transistor wafer, an L-shaped metal substrate is further included, one side of the L-shaped metal substrate is smaller in thickness, the power transistor wafer is welded on the top surface of the side of the L-shaped metal substrate, which is smaller in thickness, through the drain electrode bonding pad, the top surface of the power transistor wafer is flush with the top surface of the side, which is larger in thickness, of the L-shaped metal substrate, and the power transistor package further comprises insulating filling sizing material, wherein the insulating filling sizing material is filled on the top surface of the side, which is smaller in thickness, of the L-shaped metal substrate, and the power transistor wafer is horizontally and circumferentially arranged.
2. 2. The metal substrate power device package of claim 1 wherein the power transistor wafer is a set of two or more transistor wafers that are each soldered to the top surface of the L-shaped metal substrate on the side of the L-shaped metal substrate having the smaller thickness by a drain pad.

Description

Metal substrate power device package Technical Field The invention relates to a packaging technology for a power device, optimization of a chip heat dissipation technology and architecture design, and relates to packaging technologies of silicon-based transistors and third-generation and fourth-generation semiconductor transistors. Background Power transistors (e.g., MOSFETs, HEMTs, and IGBTs) are widely used in high power electronic devices such as power management modules, electric vehicle drive systems, and industrial motor control. The third generation semiconductor materials GaN (gallium nitride) and SiC (silicon carbide) are representatives of wide forbidden band semiconductors, and the power device manufactured by gallium nitride has the remarkable characteristics of high switching speed, low on-resistance, small chip area and the like, and is widely applied to the fields of power adapters, industrial power supplies, automobile electronics and the like. The ultra-wide band gap power devices of the fourth generation semiconductor materials mainly represented by diamond, gallium oxide and the like are put into practical application, and the power devices manufactured by the ultra-wide band gap power devices can also work at higher temperature. Conventional power transistor packages typically employ complex lead frame and metal clip structures to make electrical connection of the source, gate and drain. However, the packaging mode has the following problems of complex process, additional metal clamping pieces and welding steps, increased manufacturing cost and time, larger volume, larger occupied space of the traditional packaging structure, difficulty in meeting the miniaturization requirement of modern electronic equipment, limited heat dissipation performance, longer heat dissipation path in the traditional packaging, higher heat resistance and influence on the performance of the device. Disclosure of Invention In order to solve the problems, the invention provides a power transistor packaging structure based on an L-shaped metal substrate, which simplifies the packaging process, improves the heat dissipation performance and reduces the manufacturing cost. In order to achieve the technical purpose, the scheme of the invention is that the metal substrate power device package comprises a power transistor wafer, wherein the power transistor comprises a MOSFET (metal oxide semiconductor field effect transistor), a high electron mobility transistor HEMT (high electron mobility transistor) and an IGBT (insulated gate bipolar transistor), drain electrode pads are distributed on the bottom surface of the power transistor wafer, source electrode pads and switch control electrode pads are distributed on the top surface of the power transistor wafer, the pads on the wafer are made of a solderable material in SMT (surface mount technology) production of electronic products and can be achieved by adopting a chemical plating or copper bump technology, in the existing wafer mass production technology, the wafer pad processing technology belongs to a wafer level chip packaging (WLCSP) technology, the metal substrate also comprises an L-shaped metal substrate, one side of the L-shaped metal substrate is small in thickness, the power transistor wafer is welded on the top surface of one side of the L-shaped metal substrate through the drain electrode pads, the top surface of the power transistor wafer is flush with the top surface of one side of the L-shaped metal substrate, the top surface of the upper side of the L-shaped metal substrate is flush with the top surface of the power transistor wafer, the top surface of the upper surface of the power transistor wafer is made of a bonding material is electrically connected with the drain electrode of the power transistor wafer through the upper surface of the drain electrode pads, the glue material is used as a drain electrode pad of a packaging material, the drain electrode pad of the wafer is filled with the Polyimide (Polyimide) and the power transistor is filled on the side of the power transistor has the drain electrode pads on the wafer, and the insulating wafer is filled with the insulating glass has the drain electrode pads on the wafer. In order to realize mass production, the L-shaped metal substrate needs to be manufactured into a plurality of joint plates of the L-shaped metal substrate, and after the insulating glue is filled, the joint plates are cut into individual small packages. Preferably, the power transistor wafer is a group of two or more transistor wafers, and the group of transistor wafers is welded on the top surface of the side of the L-shaped metal substrate with smaller thickness through the drain electrode pad. The packaged finished transistor can be used as a transistor for expanding current carrying and can also be used as a high-side circuit in a bridge circuit. The technical scheme has the beneficial effects that the packaging process is si