CN-122028774-A - Semiconductor device and method for manufacturing semiconductor device

Abstract

The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device, and aims to provide a semiconductor device and a method for manufacturing the semiconductor device capable of uniformly bonding a metal plate and a conductor plate covered with a sealing material by pressurizing a portion of the conductor plate exposed from the sealing material. The semiconductor device includes a conductor plate having a first main surface and a second main surface opposite to each other, a semiconductor element bonded to the first main surface of the conductor plate, a sealing material covering a part of the first main surface of the conductor plate and the semiconductor element, and a metal plate bonded to the second main surface of the conductor plate, wherein the first main surface of the conductor plate has a pressing portion which is an area exposed from the sealing material.

Inventors

• NAKATA YOSUKE
• SATO YUJI
• Makoto Uegaki

Assignees

• 三菱电机株式会社

Dates

Publication Date

20260512

Application Date

20251023

Priority Date

20241111

Claims (8)

1. 1. A semiconductor device, wherein, The semiconductor device includes: A conductor plate having a first main surface and a second main surface which are opposed to each other; a semiconductor element bonded to the first main surface of the conductor plate; A sealing material covering a part of the first main surface of the conductor plate and the semiconductor element, and A metal plate bonded to the second main surface of the conductor plate, The first main surface of the conductor plate has a pressing portion that is a region exposed from the sealing material.
2. 2. The semiconductor device according to claim 1, wherein, The conductor plate and the metal plate are bonded by a sintering bonding material or a solid phase bonding material.
3. 3. The semiconductor device according to claim 1, wherein, The pressing portions are a plurality of pressing portions arranged on a plurality of straight lines passing through the center of gravity of the conductor plate.
4. 4. The semiconductor device according to claim 1, wherein, The sealing material has a cut-out portion, The pressing portion is exposed from the cutout portion.
5. 5. The semiconductor device according to claim 4, wherein, The semiconductor element has a plurality of semiconductor elements, The plurality of semiconductor elements are arranged in a zigzag shape along a longitudinal direction of the first main surface of the conductor plate in such a manner that respective heat generating centers are not arranged on a straight line, The semiconductor elements disposed at both ends of the plurality of semiconductor elements are disposed closer to the center of the first main surface than one or more semiconductor elements other than the semiconductor elements disposed at both ends in the short side direction of the first main surface, The notch portion is provided in the vicinity of the semiconductor element arranged at both ends among the plurality of semiconductor elements.
6. 6. The semiconductor device according to claim 1, wherein, The semiconductor device further comprises a cross-linking material which is provided inside the conductor plate and is made of a material having a higher hardness than the conductor plate, The cross-linking material extends in the longitudinal direction of the conductor plate and is disposed directly below the pressing portion.
7. 7. The semiconductor device according to claim 6, wherein, The cross-linking material is made of a material having a smaller thermal diffusivity than the conductor plate, and is disposed at a position not directly below the semiconductor element.
8. 8. A method for manufacturing a semiconductor device according to claim 1, wherein, Has a sealing step using a mold, The mold includes an upper mold contacting from an upper surface of the conductor plate, The upper die has a protrusion contacting the pressing portion.

Description

Semiconductor device and method for manufacturing semiconductor device Technical Field The present disclosure relates to a semiconductor device and a method of manufacturing the semiconductor device. Background Patent document 1 discloses a technique of soldering a conductor plate on which a semiconductor element is mounted to an insulating substrate with a circuit pattern. However, when a conductor plate and an insulating substrate are welded, there is a problem that cracks appear in the welded portion due to stress in a cyclic test or the like. In order to solve the problem, there is a method of using a sintered bond or a solid phase bond which has a longer bonding life than welding. The sintering bonding requires a pressure bonding step in a high-temperature environment of about 300 degrees. Patent document 1 Japanese patent application laid-open No. 2024-20691 However, when the above method is applied to bonding of a conductor plate and a metal plate covered with a sealing material, the sealing material softens in a high-temperature environment in the press bonding step. As a result, the sealing material is broken or deformed around the pressing portion, and therefore, it is difficult to obtain uniform bonding. Disclosure of Invention The present disclosure has been made to solve the above-described problems, and an object of the present disclosure is to provide a semiconductor device and a method for manufacturing a semiconductor device capable of uniformly bonding a metal plate and a conductor plate covered with a sealing material by pressurizing a portion of the conductor plate exposed from the sealing material. The semiconductor device of the present disclosure preferably includes a conductor plate having a first main surface and a second main surface opposite to each other, a semiconductor element bonded to the first main surface of the conductor plate, a sealing material covering a part of the first main surface of the conductor plate and the semiconductor element, and a metal plate bonded to the second main surface of the conductor plate, wherein the first main surface of the conductor plate has a pressing portion which is an area exposed from the sealing material. According to the aspect of the present disclosure, by pressurizing a portion of the conductor plate exposed from the sealing material, the conductor plate covered with the sealing material and the metal plate can be joined uniformly. Drawings Fig. 1 is a plan view showing a semiconductor device according to embodiment 1 of the present disclosure. Fig. 2 is a first diagram showing a sealing process of the semiconductor device according to embodiment 1 of the present disclosure. Fig. 3 is a second diagram showing a sealing process of the semiconductor device according to embodiment 1 of the present disclosure. Fig. 4 is a third diagram showing a sealing process of the semiconductor device according to embodiment 1 of the present disclosure. Fig. 5 is a fourth diagram showing a sealing process of the semiconductor device according to embodiment 1 of the present disclosure. Fig. 6 is a plan view showing a semiconductor device according to embodiment 2 of the present disclosure. Fig. 7 is a diagram showing thermal interference of the semiconductor device according to the comparative example. Fig. 8 is a diagram showing thermal interference of the semiconductor device according to embodiment 2 of the present disclosure. Fig. 9 is a first diagram showing a sealing process of the semiconductor device according to embodiment 2 of the present disclosure. Fig. 10 is a second diagram showing a sealing process of the semiconductor device according to embodiment 2 of the present disclosure. Fig. 11 is a third diagram showing a sealing process of the semiconductor device according to embodiment 2 of the present disclosure. Fig. 12 is a fourth diagram showing a sealing process of the semiconductor device according to embodiment 2 of the present disclosure. Fig. 13 is a plan view showing a semiconductor device according to embodiment 3 of the present disclosure. Fig. 14 is a cross-sectional view taken along A-A ́ of fig. 13. Fig. 15 is a sectional view taken along B-B ́ of fig. 13. Description of the reference numerals Conductor board; conductor plate; the present invention provides a semiconductor device including a pressing portion, a 14 center of gravity, a 16 center of gravity, a straight line, a 20 center of gravity, a semiconductor element, a 20a center of gravity, a 20b center of gravity, a 20c center of gravity, a 20d center of gravity, a 20c center of gravity, a 30 c center of gravity, a 40 c center of gravity, a 62 c center of gravity, a 70 c cross-linking material, a 100 c center of gravity, and a 100b center of gravity. Detailed Description A semiconductor device according to the present disclosure will be described with reference to the accompanying drawings. The same or corresponding components are denoted by the same reference numerals,