Search

CN-122028777-A - High-integration double-sided plastic package structure and packaging method

CN122028777ACN 122028777 ACN122028777 ACN 122028777ACN-122028777-A

Abstract

The invention relates to the technical field of chip packaging, in particular to a high-integration double-sided plastic packaging structure and a packaging method, wherein the structure comprises a substrate, a first inverted upper core chip and a first resistance-capacitance sensor are arranged on the front surface of the substrate, and a Wire Bond chip is connected to the first inverted upper core chip; the first plastic package body, the second flip chip is connected with the base plate through the conductive column penetrating the first plastic package body, the left side area of the second flip chip is connected with the base plate through the conductive column, the right side area is connected with the Wire Bond chip, the back of the base plate is provided with the third flip chip and the tin ball, the third plastic package body is arranged for coating, the tin ball is exposed out of the third plastic package body, and tin bumps are arranged around the tin ball. The invention adopts a double-layer plastic package structure and a vertical interconnection mode to package the front side of the substrate, and adopts a single-layer structure to package the chips on the back side, thereby improving the space utilization rate of the substrate, integrating a plurality of chips and passive devices in a limited area, and supporting the complicated function modularization.

Inventors

  • HU JUAN
  • LI PENGXUAN
  • CHEN XINGLONG
  • GAO RUIFENG

Assignees

  • 华天科技(南京)有限公司

Dates

Publication Date
20260512
Application Date
20260202

Claims (10)

  1. 1. The high-integration double-sided plastic package structure is characterized by comprising a substrate (12), wherein a first inverted upper core chip (4) and a first resistance-capacitance sensor (10) are arranged on the front surface of the substrate (12), and a Wire Bond chip (3) is connected and arranged on the first inverted upper core chip (4); The first plastic package body (11) is used for coating the first Wire Bond chip (3), the first flip chip (4) and the first resistance-capacitance sensor (10); The second plastic package body (1) is used for coating the second flip-chip upper chip (2) and the second resistance-capacitance sensing device (5), the second flip-chip upper chip (2) is connected with the substrate (12) through the conductive column (8) penetrating through the first plastic package body (11), the left side area of the second flip-chip upper chip (2) is connected with the substrate (12) through the conductive column (8), and the right side area is connected with the Wire Bond chip (3); The back of the substrate (12) is provided with a third flip chip (9) and a tin ball (7), the third plastic package body (6) is arranged for coating, the tin ball (7) is exposed out of the third plastic package body (6), and tin bumps are arranged around the tin ball (7).
  2. 2. The high-integration double-sided plastic package structure according to claim 1, wherein the substrate (12) is a multi-layer composite material formed by laminating resin, a copper layer and glass fiber cloth, and the conductive posts (8) are copper posts or copper wires.
  3. 3. The high-integration double-sided plastic package structure according to claim 1, wherein the Wire Bond chip (3) is attached to the back surface of the first flip-chip upper core chip (4) through a DAF adhesive film.
  4. 4. The high-integration double-sided plastic package structure according to claim 1, wherein the first plastic package body (11) is epoxy resin, and the first plastic package body (11) is manufactured by a FAM open molding process.
  5. 5. The high-integration double-sided plastic package structure according to claim 1, wherein the surface of the Wire Bond chip (3) is not subjected to plastic package, and the welding spots are exposed.
  6. 6. The high-integration double-sided plastic package structure according to claim 1, wherein the thickness of the first plastic package body (11) is determined according to the thickness of the first flip-chip upper core (4) and the thickness of the mounted device.
  7. 7. The high-integration double-sided plastic package structure according to claim 1, wherein the thickness of the second plastic package body (1) is determined according to the thickness of the second flip-chip upper core (2) and the thickness of the mounted device.
  8. 8. The high-integration double-sided plastic package structure according to claim 1, wherein the thickness of the third plastic package body (6) is determined according to the thickness of the third flip-chip upper core (9).
  9. 9. The high-integration double-sided plastic package structure according to claim 1, wherein the tin bump is formed by grinding the third plastic package body (6) to expose the tin ball (7), grooving the outer side of the tin ball (7) by a laser grooving process, printing soldering flux at the grooving position, and passing through a furnace to form the tin bump.
  10. 10. The packaging process of the high-integration double-sided plastic packaging structure according to claim 1 to 9, which is characterized by comprising the following steps: s1, attaching a first inverted upper core chip (4) and a first resistance-capacitance sensing component to the front surface of a substrate (12); S2, attaching a Wire Bond chip (3) on the back surface of the first inverted upper core chip (4); s3, attaching a conductive column (8) on the substrate (12); s4, forming a first plastic package body (11) through primary plastic package; S5, attaching a second inverted upper core chip (2) and a second resistance-capacitance sensing component; s6, forming a second plastic package body (1) through second plastic package; s7, attaching a third inverted upper core chip (9) and a ball mounting on the back surface of the substrate (12); s8, forming a third plastic package body (6) through third plastic package; S9, grinding the interface of the solder ball (7), and forming tin bumps on the solder ball (7) through laser and printing soldering flux.

Description

High-integration double-sided plastic package structure and packaging method Technical Field The invention relates to the technical field of chip packaging, in particular to a high-integration double-sided plastic packaging structure and a packaging method. Background The semiconductor packaging technology is used as a key link for connecting chips and systems, the product integration level is required to be higher and higher in the existing semiconductor industry, the packaging size is smaller and smaller, and therefore the design of stacking the chips inside the package is particularly important. Conventional semiconductor packaging techniques, such as single sided packaging or simple double sided packaging, increasingly exhibit their limitations in facing the high integration requirements. While simple double-sided packages can increase the integration level to some extent, they are limited by the packaging process and signal integrity requirements, and the integration level lifting space is still limited. In addition, with the continuous shrinking of chip size and increasing complexity of functions, conventional packaging techniques also face serious challenges in terms of heat dissipation, electrical performance, and the like. The invention discloses a traditional flip chip, which is characterized in that a Wire bond is arranged at the bottom of the flip chip, and a Wire bond chip is stacked above the chip through DAF. Although the stacked core design has great potential in improving the integration level, the existing stacked core packaging technology still has a plurality of defects that, for example, the partial stacked core packaging technology needs complex process steps and expensive equipment investment, so that the manufacturing cost is high, and the other technologies are limited by material performance and process stability, so that the reliability and long-term stability of the packaged product are difficult to ensure. Therefore, developing an efficient, reliable, low cost stacked die packaging technology is an urgent need in the current semiconductor packaging arts. Disclosure of Invention Aiming at the problems in the prior art, the invention provides a high-integration double-sided plastic package structure and a packaging method, which realize the optimization of the existing core stacking mode and further improve the utilization rate of a substrate. The invention is realized by the following technical scheme: The high-integration double-sided plastic package structure comprises a substrate, wherein the front surface of the substrate is provided with a first flip chip and a first resistance-capacitance sensor, and the first flip chip is connected with a Wire Bond chip; The first plastic package body is used for coating the first Wire Bond chip, the first flip-chip upper core chip and the first resistance-capacitance sensor; the second plastic package body is used for coating the second inverted upper core chip and the second resistance-capacitance sensing device, the second inverted upper core chip is connected with the substrate through a conductive column penetrating through the first plastic package body, the left side area of the second inverted upper core chip is connected with the substrate through the conductive column, and the right side area of the second inverted upper core chip is connected with the Wire Bond chip; the back of the substrate is provided with a third flip chip and a tin ball, the third plastic package body is arranged for coating, the tin ball is exposed out of the third plastic package body, and tin bumps are arranged around the tin ball. Preferably, the substrate is a multi-layer composite material formed by laminating resin, a copper layer and glass fiber cloth, and the conductive column adopts a copper column or a copper wire. Preferably, the Wire Bond chip is attached to the back side of the first flip-chip die by a DAF adhesive film. Preferably, the first plastic package is epoxy resin, and the first plastic package is performed by a FAM open molding process. Preferably, the surface of the Wire Bond chip is not subjected to plastic packaging, and the welding spots are exposed. Preferably, the thickness of the first plastic package body is determined according to the thickness of the first flip-chip upper core and the thickness of the mounted device. Preferably, the thickness of the second plastic package is determined according to the thickness of the second flip-chip upper core and the thickness of the mounted device. Preferably, the thickness of the third plastic package body is determined according to the thickness of the third flip-chip upper core. Preferably, the tin bump is formed by grinding the third plastic package body to expose the tin ball, grooving the outer side of the tin ball by a laser grooving process, printing soldering flux at the grooving position, and passing through a furnace to form the tin bump. A packaging process of a high-integr