CN-122029480-A - Array substrate and display device

CN122029480ACN 122029480 ACN122029480 ACN 122029480ACN-122029480-A

Abstract

An array substrate and a display device, wherein the array substrate is provided with a display area (AA) and a non-display area (NAA), the non-display area (NAA) comprises a binding area (BOD), the array substrate comprises a substrate (1), a first conductive layer group (2) is arranged on one side of the substrate (1), the first conductive layer group (2) comprises a first wiring (21), an insulating layer group (3) is arranged on one side of the first conductive layer group (2) which faces away from the substrate (1), a concave part (31) which is positioned in the non-display area (NAA) is arranged on the insulating layer group (3), the orthographic projection of the binding area (BOD) on the substrate (1) and the orthographic projection of the concave part (31) on the substrate (1) at least partially overlap, a first via hole (32) is arranged on the insulating layer group (3) which is positioned on one side of the concave part (31) which is close to the display area (AA), the first wiring (21) extends from at least the first via hole (32) to the binding area (BOD), a second conductive layer (4) is arranged on one side of the insulating layer (4) which faces away from the substrate (1) which is positioned on the second conductive layer (41) which is positioned close to the display area (41), and is connected to the first trace (21) through a first via (32). The second wiring (41) of the array substrate is not easy to break.

Inventors

GU XIAOFANG
GAN QUAN
MA XIAOYE
WANG YONGCAN
ZHANG RAN
XU XIAOWEI
DU RUIFANG
Huang huanhuan
LIU LING
YANG KUN

Assignees

京东方科技集团股份有限公司
合肥鑫晟光电科技有限公司

Dates

Publication Date: 20260512
Application Date: 20240912

Claims (20)

An array substrate having a display region and a non-display region, the non-display region including a binding region, wherein the array substrate comprises: A substrate base; the first conductive layer group is arranged on one side of the substrate base plate and comprises a first wiring; The insulation layer group is arranged on one side of the first conductive layer group, which is away from the substrate, the insulation layer group is provided with a concave part, the concave part is positioned in the non-display area, the orthographic projection of the binding area on the substrate and the orthographic projection of the concave part on the substrate are at least partially overlapped, the insulation layer group is provided with a first via hole, the first via hole is positioned on one side of the concave part, which is close to the display area, and the first wiring extends to the binding area from at least the first via hole; The second conducting layer is arranged on one side, away from the substrate, of the insulating layer group, the second conducting layer comprises a second wire, the second wire is positioned on one side, close to the display area, of the concave portion, the second wire is electrically connected to the display area, and the second wire is connected to the first wire through the first via hole.
The array substrate of claim 1, wherein a distance between the first via and an edge of the recess near the display region is 10 μm or more.
The array substrate of claim 1, wherein the first conductive layer group comprises: The first sub-conductive layer is arranged on one side of the substrate base plate; The first insulating layer is arranged on one side of the first sub-conducting layer, which is away from the substrate base plate; The second sub-conducting layer is arranged on one side, away from the substrate base plate, of the first insulating layer, and comprises the first wiring.
The array substrate of claim 1, wherein the first conductive layer group comprises: The first sub-conductive layer is arranged on one side of the substrate base plate and comprises a first connecting wire; The first insulating layer is arranged on one side, away from the substrate base plate, of the first sub-conducting layer, and a second via hole is formed in the first insulating layer; The second sub-conducting layer is arranged on one side, away from the substrate, of the first insulating layer, the second sub-conducting layer comprises a second connecting wire, the second connecting wire is electrically connected with the first connecting wire through the second through hole to form the first wire, and the second wire is connected to the second connecting wire through the first through hole.
The array substrate of claim 4, wherein an orthographic projection of the second connection trace on the substrate is located between an orthographic projection of the recess on the substrate and the display region, and the first connection trace extends from at least the second via to the bonding region.
The array substrate of claim 4, wherein the first sub-conductive layer further comprises a third wire and a fourth wire, the third wire extends from the bonding region to the display region, the second sub-conductive layer further comprises a fifth wire, the orthographic projection of the fifth wire on the substrate is located at one side of the concave portion, close to the display region, of the substrate, the orthographic projection of the concave portion on the substrate is located at one side of the concave portion, close to the display region, the fifth wire is electrically connected to the display region, a third via hole is arranged on the first insulating layer, the third via hole is located at one side of the concave portion, close to the display region, the fourth wire extends from at least the third via hole to the bonding region, and the fifth wire is connected to the fourth wire through the third via hole.
The array substrate of claim 3 or 4, wherein the first sub-conductive layer includes a third trace extending from the bonding region to the display region, and the second sub-conductive layer includes a sixth trace extending from the bonding region to the display region.
The array substrate of any one of claims 2-6, wherein the insulating layer group comprises: The first protection layer is arranged on one side, away from the substrate, of the first conductive layer group, and a first sub-via hole is formed in the first protection layer; The first planarization layer is arranged on one side, away from the substrate, of the first protection layer, and is provided with a second sub-via hole and a first opening; The second protective layer is arranged on one side, away from the substrate, of the first planarization layer, a third sub-via hole is formed in the second protective layer, and the second conductive layer is arranged on one side, away from the substrate, of the second protective layer; The third sub-via hole, the second sub-via hole and the first sub-via hole are sequentially communicated to form the first via hole, and the orthographic projection of the concave part on the substrate is located in the orthographic projection of the first opening part on the substrate.
The array substrate of claim 8, wherein in the display region, the array substrate further comprises: The first electrode is arranged between the first planarization layer and the second protection layer; the third protective layer is arranged on one side of the second conductive layer, which is away from the substrate base plate; The second electrode is arranged on one side of the third protective layer, which is away from the substrate.
The array substrate of any one of claims 2-6, wherein the insulating layer group comprises: The first protection layer is arranged on one side, away from the substrate, of the first conductive layer group, and a first sub-via hole is formed in the first protection layer; the first planarization layer is arranged on one side, away from the substrate, of the first protection layer, a second sub-via hole and a first opening are formed in the first planarization layer, and the second conductive layer is arranged on one side, away from the substrate, of the first planarization layer; The second sub-via holes and the first sub-via holes are sequentially communicated to form the first via holes, and orthographic projection of the concave part on the substrate is located in orthographic projection of the first opening part on the substrate.
The array substrate of claim 10, wherein the array substrate further comprises: The second planarization layer is arranged on one side, away from the substrate, of the second conductive layer, and is provided with a second opening part, and the orthographic projection of the second opening part on the substrate is positioned in the orthographic projection of the first opening part on the substrate; The second protective layer is arranged on one side of the second planarization layer, which is away from the substrate.
The array substrate of claim 11, wherein in the display region, the array substrate further comprises: A first electrode arranged between the second planarization layer and the second protection layer; The second electrode is arranged on one side of the second protective layer, which is away from the substrate.
The array substrate of claim 1, wherein the first conductive layer group comprises: the first sub-conductive layer is arranged on one side of the substrate base plate and comprises the first wiring.
The array substrate of claim 13, wherein the insulating layer group comprises: The first insulating layer is arranged on one side, away from the substrate base plate, of the first sub-conducting layer, and a fourth sub-via hole is formed in the first insulating layer; The first protection layer is arranged on one side, away from the substrate, of the first insulating layer, and a first sub-via hole is formed in the first protection layer; The first planarization layer is arranged on one side, away from the substrate, of the first protection layer, and is provided with a second sub-via hole and a first opening; The second protective layer is arranged on one side, away from the substrate, of the first planarization layer, a third sub-via hole is formed in the second protective layer, and the second conductive layer is arranged on one side, away from the substrate, of the second protective layer; the third sub-via hole, the second sub-via hole, the first sub-via hole and the fourth sub-via hole are sequentially communicated to form the first via hole, and the orthographic projection of the concave part on the substrate is located in the orthographic projection of the first opening part on the substrate.
The array substrate of claim 14, wherein the first sub-conductive layer comprises a third trace extending from the bonding region to the display region, the array substrate further comprising: The second sub-conductive layer is arranged between the first insulating layer and the first protective layer, and comprises a sixth wiring, and the sixth wiring extends from the binding area to the display area.
The array substrate of claim 14, wherein in the display region, the array substrate further comprises: The first electrode is arranged between the first planarization layer and the second protection layer; the third protective layer is arranged on one side of the second conductive layer, which is away from the substrate base plate; The second electrode is arranged on one side of the third protective layer, which is away from the substrate.
The array substrate of claim 13, wherein the insulating layer group comprises: The first insulating layer is arranged on one side, away from the substrate base plate, of the first sub-conducting layer, and a fourth sub-via hole is formed in the first insulating layer; The first protection layer is arranged on one side, away from the substrate, of the first conductive layer group, and a first sub-via hole is formed in the first protection layer; the first planarization layer is arranged on one side, away from the substrate, of the first protection layer, a second sub-via hole and a first opening are formed in the first planarization layer, and the second conductive layer is arranged on one side, away from the substrate, of the first planarization layer; The second sub-via hole, the first sub-via hole and the fourth sub-via hole are sequentially communicated to form the first via hole, and orthographic projection of the concave part on the substrate is located in orthographic projection of the first opening part on the substrate.
The array substrate of claim 17, wherein the array substrate further comprises: The second planarization layer is arranged on one side, away from the substrate, of the second conductive layer, and is provided with a second opening part, and the orthographic projection of the second opening part on the substrate is positioned in the orthographic projection of the first opening part on the substrate; The second protective layer is arranged on one side of the second planarization layer, which is away from the substrate.
The array substrate according to any one of claims 3-6, 14-18, wherein in the display area, the array substrate further comprises: The grid electrode layer is arranged on one side of the substrate base plate and comprises a grid electrode; the gate insulating layer is arranged on one side of the gate layer, which is away from the substrate base plate; The active layer is arranged on one side, away from the substrate, of the gate insulating layer, and comprises a first conductive connecting part, a channel part and a second conductive connecting part which are sequentially connected; The source-drain electrode layer is arranged on one side, away from the substrate, of the active layer, the source-drain electrode layer comprises a source electrode and a drain electrode, the source electrode is connected to the first conductive connecting part, the drain electrode is connected to the second conductive connecting part, and the insulating layer is arranged on one side, away from the substrate, of the source-drain electrode layer; The touch control functional layer is arranged on one side of the insulating layer group, which is away from the substrate base plate; The touch functional layer and the second conductive layer are arranged in the same layer and the same material, the grid layer and the first sub-conductive layer are arranged in the same layer and the same material, the source drain layer and the second sub-conductive layer are arranged in the same layer and the same material, and the grid insulating layer and the first insulating layer are arranged in the same layer and the same material.
A display device comprising the array substrate of any one of claims 1 to 19.

Description

Array substrate and display device Technical Field The disclosure relates to the technical field of display, in particular to an array substrate and a display device. Background Liquid crystal displays (Liquid CRYSTAL DISPLAY, LCD) have been widely used in various display fields such as home, public place, office, personal electronic related products, etc. As LCD product requirements continue to rise and cost requirements decrease, lighter, thinner appearance and lower cost requirements become increasingly demanding. However, in the conventional liquid crystal display, display failure is likely to occur after the driver is bound again. It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art. Disclosure of Invention The present disclosure aims to overcome the above-mentioned shortcomings in the prior art, and provides an array substrate and a display device. According to one aspect of the present disclosure, there is provided an array substrate having a display region and a non-display region, the non-display region including a bonding region, the array substrate including: A substrate base; the first conductive layer group is arranged on one side of the substrate base plate and comprises a first wiring; The insulation layer group is arranged on one side of the first conductive layer group, which is away from the substrate, the insulation layer group is provided with a concave part, the concave part is positioned in the non-display area, the orthographic projection of the binding area on the substrate and the orthographic projection of the concave part on the substrate are at least partially overlapped, the insulation layer group is provided with a first via hole, the first via hole is positioned on one side of the concave part, which is close to the display area, and the first wiring extends to the binding area from at least the first via hole; The second conducting layer is arranged on one side, away from the substrate, of the insulating layer group, the second conducting layer comprises a second wire, the second wire is positioned on one side, close to the display area, of the concave portion, the second wire is electrically connected to the display area, and the second wire is connected to the first wire through the first via hole. In an exemplary embodiment of the present disclosure, a distance between the first via and an edge of the recess near the display region is 10 μm or more. In one exemplary embodiment of the present disclosure, the first conductive layer group includes: The first sub-conductive layer is arranged on one side of the substrate base plate; The first insulating layer is arranged on one side of the first sub-conducting layer, which is away from the substrate base plate; The second sub-conducting layer is arranged on one side, away from the substrate base plate, of the first insulating layer, and comprises the first wiring. In one exemplary embodiment of the present disclosure, the first conductive layer group includes: The first sub-conductive layer is arranged on one side of the substrate base plate and comprises a first connecting wire; The first insulating layer is arranged on one side, away from the substrate base plate, of the first sub-conducting layer, and a second via hole is formed in the first insulating layer; The second sub-conducting layer is arranged on one side, away from the substrate, of the first insulating layer, the second sub-conducting layer comprises a second connecting wire, the second connecting wire is electrically connected with the first connecting wire through the second through hole to form the first wire, and the second wire is connected to the second connecting wire through the first through hole. In an exemplary embodiment of the present disclosure, an orthographic projection of the second connection trace on the substrate is located between an orthographic projection of the recess on the substrate and the display area, and the first connection trace extends from at least the second via to the bonding region. In an exemplary embodiment of the disclosure, the first sub-conductive layer further includes a third wire and a fourth wire, the third wire extends from the bonding region to the display region, the second sub-conductive layer further includes a fifth wire, a front projection of the fifth wire on the substrate is located on a side of the recess portion, close to the display region, of the substrate, the fifth wire is electrically connected to the display region, a third via hole is disposed on the first insulating layer, the third via hole is located on a side of the recess portion, close to the display region, the fourth wire extends from at least the third via hole to the bonding region, and the fifth wire is connected to the fou