CN-122029523-A - Clearing prefetch stream upon detection of pipeline flush

Abstract

According to one embodiment, a method, computer system, and computer program product for managing access to data are provided. This embodiment may include identifying one or more prefetch streams. This embodiment may also include saving memory access instructions that create or advance a selected prefetch stream from one or more prefetch streams. This embodiment may also include detecting a pipeline flush prior to the saved memory access instruction. The embodiment may further include stopping the portion of the selected prefetch stream following the saved memory access instruction based on the type of the saved memory access instruction.

Inventors

• V. Brito
• G. W. Rolborg III
• B. Lloyd
• R. A. Cods

Assignees

• 国际商业机器公司

Dates

Publication Date

20260512

Application Date

20240925

Priority Date

20231020

Claims (20)

1. 1. A processor-implemented method, the method comprising: Identifying one or more prefetch streams; Saving memory access instructions that create or advance a selected prefetch stream from the one or more prefetch streams; Detecting a pipeline flush prior to the saved memory access instruction, and Stopping the portion of the selected prefetch stream following the saved memory access instruction based on the type of the saved memory access instruction.
2. 2. The method of claim 1, wherein the types of memory access instructions saved include hardware type instructions and software type instructions.
3. 3. The method of claim 1, wherein the type of the memory access instruction is a hardware push type instruction and the stopping comprises suspending the selected prefetch stream.
4. 4. The method of claim 3, wherein the type of the memory access instruction is more specifically a load instruction or a store instruction.
5. 5. The method of claim 1, further comprising: executing the stall by canceling the selected prefetch stream upon determining that the type of the memory access instruction is a create type instruction, and Upon determining that the type of the memory access instruction is a push type instruction, the stall is performed by suspending the selected prefetch stream.
6. 6. The method of claim 1, further comprising: the prefetch stream is loaded from the one or more prefetch streams into the target cache memory.
7. 7. The method of claim 1, wherein the detecting is performed by a dedicated prefetch refresh detection module.
8. 8. A computer system, the computer system comprising: One or more processors, one or more computer-readable memories, one or more computer-readable tangible storage media, and program instructions stored on at least one of the one or more tangible storage media for execution by at least one of the one or more processors via at least one of the one or more memories, wherein the computer system is capable of performing a method comprising: Identifying one or more prefetch streams; Saving memory access instructions that create or advance a selected prefetch stream from the one or more prefetch streams; Detecting a pipeline flush prior to the saved memory access instruction, and Stopping the portion of the selected prefetch stream following the saved memory access instruction based on the type of the saved memory access instruction.
9. 9. The computer system of claim 8, wherein the types of memory access instructions saved include hardware type instructions and software type instructions.
10. 10. The computer system of claim 8, wherein the type of the memory access instruction is a hardware push type instruction and the stopping comprises suspending the selected prefetch stream.
11. 11. The computer system of claim 10, wherein the type of memory access instruction is more specifically a load instruction or a store instruction.
12. 12. The computer system of claim 11, further comprising: executing the stall by canceling the selected prefetch stream upon determining that the type of the memory access instruction is a create type instruction, and Upon determining that the type of the memory access instruction is a push type instruction, the stall is performed by suspending the selected prefetch stream.
13. 13. The computer system of claim 8, further comprising: the prefetch stream is loaded from the one or more prefetch streams into the target cache memory.
14. 14. The computer system of claim 13, wherein the detecting is performed by a dedicated prefetch refresh detection module.
15. 15. A computer program product, the computer program product comprising: One or more computer-readable tangible storage media and program instructions stored on at least one of the one or more tangible storage media, the program instructions being executable by a processor capable of performing a method comprising: Identifying one or more prefetch streams; Saving memory access instructions that create or advance a selected prefetch stream from the one or more prefetch streams; Detecting a pipeline flush prior to the saved memory access instruction, and Stopping the portion of the selected prefetch stream following the saved memory access instruction based on the type of the saved memory access instruction.
16. 16. The computer program product of claim 15, wherein the saved types of memory access instructions include hardware type instructions and software type instructions.
17. 17. The computer program product of claim 15, wherein the type of the memory access instruction is a hardware push type instruction and the stopping comprises suspending the selected prefetch stream.
18. 18. The computer program product of claim 17, wherein the type of the memory access instruction is more specifically a load instruction or a store instruction.
19. 19. The computer program product of claim 18, further comprising: executing the stall by canceling the selected prefetch stream upon determining that the type of the memory access instruction is a create type instruction, and Upon determining that the type of the memory access instruction is a push type instruction, the stall is performed by suspending the selected prefetch stream.
20. 20. The computer program product of claim 15, further comprising: the prefetch stream is loaded from the one or more prefetch streams into the target cache memory.

Description

Clearing prefetch stream upon detection of pipeline flush Background The present invention relates generally to the field of computing, and more particularly to memory management. Modern computers typically use multiple memory cells with different speeds and storage sizes. Thus, efficient computation involves memory management, i.e., a set of techniques for managing data among those memory cells to optimize performance. In particular, the processor may predict which instructions may be executed soon, or which data may be used soon, and prefetch those instructions or data to a faster "lower level" memory. Disclosure of Invention According to one embodiment, a method, computer system, and computer program product for managing access to data are provided. This embodiment may include identifying one or more prefetch streams. This embodiment may also include saving memory access instructions that create or advance a selected prefetch stream from one or more prefetch streams. This embodiment may also include detecting a pipeline flush prior to the saved memory access instruction. The embodiment may further include stopping the portion of the selected prefetch stream following the saved memory access instruction based on the type of the saved memory access instruction. Drawings These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings. The various features of the drawings are not to scale as for the sake of clarity, the drawings are intended to assist one skilled in the art in understanding the invention in connection with the detailed description. In the drawings: FIG. 1 illustrates an exemplary networked computer environment, in accordance with at least one embodiment. FIG. 2 illustrates an operational flow diagram of a process for clearing a prefetch stream upon detection of a pipeline flush. FIG. 3 illustrates an exemplary processor set for detecting pipeline flushes. Detailed Description In accordance with one aspect of the present invention, there is a method of flushing a prefetch stream upon detection of a pipeline flush. The method may include identifying one or more prefetch streams. The method may further include saving memory access instructions that create or advance the selected prefetch stream from the one or more prefetch streams. The method may further include detecting a pipeline flush prior to the saved memory access instruction. The method may also include stopping the portion of the selected prefetch stream following the saved memory access instruction based on the type of the saved memory access instruction. Advantages of this approach may include maintaining a fast, useful memory clear of unnecessary data, thus improving the efficiency of the system, for example in the case of erroneous branch predictions. It also allows aggressive prefetching without risk of invalid locking of the useful memory. In an embodiment, the types of memory access instructions saved include hardware type instructions and software type instructions. This may allow the method to achieve its efficiency on many different types of prefetch streams, rather than just one type. In an embodiment, the type of memory access instruction is a hardware push type instruction. Recognizing this has the technical advantage of further achieving efficiency across different types of instructions. In an embodiment, the stopping includes suspending the selected prefetch stream. This has the advantage of helping to discern different types of refreshes, e.g., allowing the system to recover and preserve the prefetch stream in the case of a store ordering refresh, while purging the prefetch stream in other cases. This improves consistency of the efficiency grant benefits of the method and reduces the risk of purging useful data from advantageous locations in memory. In an embodiment, the type of memory access instruction is more specifically a load instruction or a store instruction. This distinction also allows the nature of the system to respond to specific memory access instructions, allowing for greater efficiency and fewer errors. In an embodiment, upon determining that the type of memory access instruction is a create type instruction, stopping may be performed by canceling the selected prefetch stream. This process has the technical advantage of simply and quickly purging prefetched flows that do not need to be paused and helping prioritize efficient memory allocation. In an embodiment, upon determining that the type of memory access instruction is a push type instruction, the stall may be performed by suspending the selected prefetch stream. This has the advantage of helping to discern different types of refreshes, e.g., allowing the system to recover and preserve the prefetch stream in the case of a store ordering refresh, while purging the prefetch stream