CN-122029830-A - Image sensor, imaging apparatus, and method for controlling image sensor

CN122029830ACN 122029830 ACN122029830 ACN 122029830ACN-122029830-A

Abstract

An image sensor that performs High Dynamic Range (HDR) synthesis improves security. The vertical driving circuit drives a plurality of effective pixels arranged in a two-dimensional lattice pattern in the pixel array unit in units of rows and sequentially outputs a first effective pixel signal and a second effective pixel signal having different exposure times. The column signal processing unit reads the first effective pixel signal in a first reading period and reads the second effective pixel signal in a second reading period, which overlaps the first reading period in a partial period. The logic circuit performs a predetermined self-diagnosis process within a predetermined period that does not correspond to the partial period of a period from the start of the first reading period to the end of the second reading period.

Inventors

YOKOYAMA MASANAO
TSUCHIYA TAKASHI

Assignees

索尼半导体解决方案公司

Dates

Publication Date: 20260512
Application Date: 20241011
Priority Date: 20231208

Claims (15)

1. An image sensor, comprising: a vertical driving circuit that drives a plurality of effective pixels arranged in a two-dimensional lattice pattern in a pixel array unit in units of rows and sequentially outputs a first effective pixel signal and a second effective pixel signal having different exposure times; A column signal processing unit that reads the first effective pixel signal in a first reading period and reads the second effective pixel signal in a second reading period that overlaps the first reading period in a partial period, and Logic circuit that performs a predetermined self-diagnosis process within a predetermined period that does not correspond to the partial period of a period from the start of the first reading period to the end of the second reading period.
2. The image sensor of claim 1, wherein, A predetermined number of dummy pixels, which output dummy pixel signals of a predetermined voltage, The column signal processing unit sequentially reads the dummy pixel signal and one of the first effective pixel signal and the second effective pixel signal within the predetermined period, and The self-diagnosis process includes a process for judging whether the dummy pixel signal is an expected value.
3. The image sensor of claim 2, wherein, The dummy pixel includes adjacent first and second dummy pixels, an The first dummy pixel and the second dummy pixel output first dummy pixel signals and second dummy pixel signals having different voltages.
4. The image sensor of claim 1, wherein the column signal processing unit comprises: An analog-to-digital converter that converts each of the first effective pixel signal and the second effective pixel signal into a digital signal; a test pattern generation unit that generates a predetermined test pattern; a multiplexer for selecting and outputting one of the digital signal and the test mode, and A latch unit which holds the signal from the multiplexer, and The self-diagnosis process includes a process for judging whether or not the test pattern held in the latch unit is identical to the generated test pattern.
5. The image sensor of claim 4, wherein, The latch unit outputs the held signal in synchronization with the horizontal synchronization signal, and The column signal processing unit further includes a sense amplifier that amplifies the signal from the latch unit and supplies the amplified signal to the logic circuit.
6. The image sensor of claim 1, wherein the logic circuit comprises: A first multiplexer that selects and outputs one of a first digital signal and a predetermined test mode; A second multiplexer that selects and outputs one of a second digital signal and the test mode; A first data path that processes a signal from the first multiplexer and outputs first processed data; a second data path processing the signal from the second multiplexer and outputting second processed data, and And a comparison unit that compares the first processing data with the second processing data.
7. The image sensor of claim 1, further comprising: a temperature sensor that outputs a sensor voltage corresponding to a temperature; A selector that selects one of a constant reference voltage and the sensor voltage and outputs the selected voltage as an output voltage, and An analog-to-digital converter that converts the voltage from the selector to a digital signal, wherein, The self-diagnosis process includes a process for judging whether the digital signal corresponding to the reference voltage is an expected value.
8. The image sensor of claim 1, wherein, A predetermined number of identification pixels are also arranged in the pixel array unit, the identification pixels outputting identification pixel signals for indicating a specific logic value, an The self-diagnosis process includes a process for judging whether a code arranged by digital signals corresponding to the identification pixel signals in a row to be accessed is an identification code assigned to the row to be accessed.
9. The image sensor of claim 1, wherein the logic circuit comprises: A self-diagnosis processing unit that performs the self-diagnosis processing for the predetermined period of time and outputs a diagnosis result; an image processing unit that generates raw data by combining the first effective pixel signal and the second effective pixel signal, and A format processing unit that generates a frame including the original data.
10. The image sensor of claim 9, wherein, The format processing unit generates the frame in which the diagnosis result is embedded.
11. The image sensor of claim 9, further comprising: A first transmitting unit for transmitting the frame, and And a second transmission unit that transmits the diagnosis result.
12. The image sensor of claim 9, further comprising: And a dedicated terminal outputting the diagnosis result.
13. The image sensor of claim 1, wherein, The logic circuit also performs the self-diagnosis process in a period from the end of the second reading period to the start of the next first reading period.
14. An imaging apparatus, comprising: An image sensor includes a vertical driving circuit that drives a plurality of effective pixels arranged in a two-dimensional lattice pattern in a pixel array unit in units of rows and sequentially outputs a first effective pixel signal and a second effective pixel signal having different exposure times, a column signal processing unit that reads the first effective pixel signal in a first reading period and reads the second effective pixel signal in a second reading period that overlaps with the first reading period in a partial period, and a logic circuit that performs a predetermined self-diagnosis process in a predetermined period that does not correspond to the partial period in a period from the start of the first reading period to the end of the second reading period, and And a processing unit that processes signals from the image sensor.
15. A method for controlling an image sensor, comprising: A driving step of driving a plurality of effective pixels arranged in a two-dimensional lattice pattern in a pixel array unit in units of rows and sequentially outputting a first effective pixel signal and a second effective pixel signal having different exposure times; A column signal processing step of reading the first effective pixel signal in a first reading period and the second effective pixel signal in a second reading period, the second reading period and the first reading period overlapping in a partial period, and And a diagnosis step of performing a predetermined self-diagnosis process within a predetermined period that does not correspond to the partial period of a period from the start of the first reading period to the end of the second reading period.

Description

Image sensor, imaging apparatus, and method for controlling image sensor Technical Field The present invention relates to an image sensor. In particular, the present invention relates to an image sensor, an imaging apparatus, and a method for controlling the image sensor that perform processing for expanding a dynamic range. Background In general, in order to extend the dynamic range, imaging devices and the like employ high dynamic range (HDR; HIGH DYNAMIC RANGE) synthesis by exposing pixels to light over a plurality of different exposure times and synthesizing the read pixel signals. In the HDR synthesis, if the pixel signals are read in units of rows, a Digital Over Lap (DOL) mode in which a read period having a longer exposure time and a read period having a shorter exposure time partially overlap may be used. An image sensor that performs self-diagnosis processing in a vertical (V) blanking period in which a drive signal is not supplied to a pixel has been proposed (for example, see patent document 1). CITATION LIST Patent literature Patent document 1 Japanese patent application laid-open No. 2018-125840 Disclosure of Invention Problems to be solved by the invention In the related art described above, the self-diagnosis process is performed within the V blanking period to detect a failure during the imaging operation. However, in the above-described conventional technique, even if a fault occurs outside the V blanking period, the fault cannot be detected before the next V blanking period. Therefore, transmission of the diagnosis result to the outside of the image sensor is delayed, and the security of the system including the image sensor is insufficient. The present technology has been proposed in view of such a situation, and an object of the present technology is to improve the security of an image sensor that performs HDR synthesis. Solution to the problem The present invention is directed to solving the above-described problems, a first aspect of which is an image sensor including a vertical driving circuit for driving a plurality of effective pixels arranged in a two-dimensional lattice pattern in a pixel array unit in units of rows and sequentially outputting a first effective pixel signal and a second effective pixel signal having different exposure times, a column signal processing unit for reading the vertical driving circuit in a first reading period which drives the plurality of effective pixels arranged in the two-dimensional lattice pattern in the pixel array unit in units of rows and sequentially outputs the first effective pixel signal and the second effective pixel signal having different exposure times, a column signal processing unit for reading the first effective pixel signal in the first reading period and reading the second effective pixel signal in the second reading period which overlaps with the first reading period in a partial period, and a logic circuit for performing a predetermined self-diagnosis process in a predetermined period which does not correspond to the partial period from the first reading period to the second reading period which ends. The effect thereby created is an improved safety. Further, in the first aspect, a predetermined number of dummy pixels outputting dummy pixel signals of a predetermined voltage may be further arranged in the pixel array unit, the column signal processing unit may sequentially read the dummy pixel signals and one of the first effective pixel signal and the second effective pixel signal within the predetermined period, and the self-diagnosis process may include a process for judging whether the dummy pixel signals are expected values. The effect thereby arises that a fault, for example, of a vertical signal line is detected. Further, in the first aspect, the dummy pixels may include adjacent first and second dummy pixels, and the first and second dummy pixels may output first and second dummy pixel signals having different voltages. The effect thereby created is that a short circuit between two adjacent columns is detected. Further, in the first aspect, the column signal processing unit may include an analog-to-digital converter that converts each of the first effective pixel signal and the second effective pixel signal into a digital signal, a test pattern generating unit that generates a predetermined test pattern, a multiplexer that selects and outputs one of the digital signal and the test pattern, and a latch unit that holds a signal from the multiplexer, and the self-diagnosis process may include a process for judging whether the test pattern held in the latch unit is the same as the generated test pattern. The effect thereby produced is that a failure of the latch unit or the like is detected. Further, in the first aspect, the latch unit may output the held signal in synchronization with a horizontal synchronization signal, and the column signal processing unit may further include a sense amplifier that amplifies the signal