CN-122030003-A - Method for manufacturing semiconductor device, substrate processing device, and program

Abstract

The invention provides a technology capable of inhibiting pore generation when an underfill material is buried between a substrate and a semiconductor chip. The technique includes forming a spacer film having at least one insulating film on surfaces of a substrate and a micro bump formed on a first surface of the substrate on a bonding surface side of a semiconductor chip and a second surface of the semiconductor chip on the bonding surface side of the substrate, and forming an underfill film on the spacer film between the substrate and the semiconductor chip bonded by the micro bump.

Inventors

• ASHIHARA HIROSHI
• SHI CHUANGANG
• MACHIDA SHUNTARO
• OHASHI NAOFUMI

Assignees

• 株式会社国际电气

Dates

Publication Date

20260512

Application Date

20240327

Claims (18)

1. 1. A method for manufacturing a semiconductor device is characterized by comprising the steps of: forming a spacer film having at least one insulating film by surfaces of a substrate and a micro bump formed on a first surface of the substrate on a bonding surface side with a semiconductor chip and a second surface of the semiconductor chip on the bonding surface side with the substrate, respectively; an underfill film is formed on the pad film between the substrate and the semiconductor chip bonded by the micro bump.
2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein, The at least one insulating film is formed by an ALD method or a CVD method.
3. 3. The method for manufacturing a semiconductor device according to claim 1, wherein, The pad film includes a metal film formed on the at least one insulating film.
4. 4. The method for manufacturing a semiconductor device according to claim 1, wherein, The pad film includes an insulating film that blocks buildup on the microbumps.
5. 5. The method for manufacturing a semiconductor device according to claim 1, wherein, Among the spacer films, the film in contact with the underfill film is an insulating film containing an organic group.
6. 6. The method for manufacturing a semiconductor device according to claim 5, wherein, The insulating film containing an organic group contains an alkyl group.
7. 7. The method for manufacturing a semiconductor device according to claim 1, wherein, The spacer film is formed by performing at least one or more steps of forming the insulating film and exposing the insulating film to a reducing atmosphere.
8. 8. A semiconductor device, characterized in that, An underfill film is formed on a spacer film having at least one insulating film formed between a substrate and a semiconductor chip, the spacer film being formed on surfaces of the first surface, the second surface and the micro bump, the spacer film being formed on a first surface of the substrate on a bonding surface side with the semiconductor chip and a second surface of the semiconductor chip on a bonding surface side with the substrate, the micro bump being bonded respectively.
9. 9. A substrate processing apparatus is used in a step of forming a liner film after the following steps: bonding a semiconductor chip on a substrate by micro bumps formed on a first surface of the substrate on a bonding surface side with the semiconductor chip and a second surface of the semiconductor chip on a bonding surface side with the substrate, respectively; Forming a spacer film having at least one insulating film by supplying a source gas to the first surface, the second surface, and the surfaces of the microbumps; An underfill film is formed on the pad film between the substrate and the semiconductor chip bonded by the micro bump, It is characterized in that the method comprises the steps of, The semiconductor device includes: a substrate supporting portion that supports the substrate to which the semiconductor chip is bonded by micro bumps formed on the first surface and the second surface; A gas supply unit that supplies a source gas to the substrate support unit; And a control unit capable of controlling the gas supply unit so as to form at least one insulating film on the first surface, the second surface, and the surface of the microbump.
10. 10. The substrate processing apparatus according to claim 9, wherein, The gas supply section further has a supply system for supplying a metalliferous feed gas, The control section controls to perform a process of forming a metal film by supplying the metal-containing source gas after forming the at least one insulating film.
11. 11. The substrate processing apparatus according to claim 9, wherein, The control section can control the gas supply section so that a lowermost layer of the at least one layer of insulating film performs a process of forming an insulating film that hinders deposition on the microbump.
12. 12. The substrate processing apparatus according to claim 9, wherein, The gas supply section further has a supply system for supplying a source gas containing an organic group, The control portion can control the gas supply portion so as to perform a process of forming the organic group-containing insulating film by supplying the organic group-containing source gas, and a film in contact with the underfill film out of the at least one insulating film becomes an organic group-containing insulating film.
13. 13. The substrate processing apparatus according to claim 9, wherein, The gas supply part further has a supply system for supplying a reducing gas, The control portion can control the gas supply portion so as to perform a process of forming the insulating film and a process of exposing the insulating film to a reducing atmosphere at least once, thereby performing a process of forming the pad film.
14. 14. A program for causing a semiconductor device manufacturing apparatus to execute the steps of: a step of bonding a semiconductor chip on a substrate by micro bumps formed on a first surface of the substrate on a bonding surface side with the semiconductor chip and a second surface of the semiconductor chip on a bonding surface side with the substrate, respectively; a step of forming a spacer film including at least one insulating film by supplying a source gas to the first face, the second face, and the surface of the microbump In the step of forming an underfill film on the liner film, And forming the insulating film.
15. 15. The program according to claim 14, wherein, After forming at least one layer of the insulating film, a step of forming the pad film including a metal film is performed by a manufacturing apparatus of a semiconductor device by a computer.
16. 16. The program according to claim 14, wherein, The step of forming the pad film including an insulating film that blocks the deposition on the microbumps is performed by a manufacturing apparatus of a semiconductor device by a computer.
17. 17. The program according to claim 14, wherein, The step of forming the spacer films is performed by a manufacturing apparatus of a semiconductor device by a computer so that a film in contact with the underfill film among the spacer films becomes an insulating film containing an organic group.
18. 18. The program according to claim 14, wherein, And a step of forming the spacer film by causing a manufacturing apparatus of a semiconductor device to execute a step of forming the insulating film and a step of exposing the insulating film to a reducing atmosphere at least once by a computer.

Description

Method for manufacturing semiconductor device, substrate processing device, and program Technical Field The present disclosure relates to a method of manufacturing a semiconductor device, a substrate processing apparatus, and a program. Background As a step of manufacturing a semiconductor device (module), a process gas is supplied to a substrate in a process container, and a film is formed on the substrate (for example, patent document 1). Prior art literature Patent literature Patent document 1 International publication No. 2022/064586 Disclosure of Invention Problems to be solved by the invention In one step of the manufacturing process of a semiconductor device in which an underfill material is buried between a substrate and a semiconductor chip, voids may be generated. The present invention provides a technique for suppressing void formation when an underfill material is embedded between a substrate and a semiconductor chip Means for solving the problems According to one aspect of the present application, there is provided a technique comprising the steps of forming a spacer film having at least one insulating film on surfaces of a substrate and a semiconductor chip bonded to at least a first surface of the substrate and a second surface of the semiconductor chip, the first surface, the second surface and the micro bump being formed on a first surface of the substrate on a bonding surface side with respect to the semiconductor chip and a second surface of the semiconductor chip on a bonding surface side with respect to the substrate, and forming an underfill film on the spacer film between the substrate and the semiconductor chip bonded to each other by the micro bump. Effects of the invention According to the present invention, the occurrence of voids in embedding the underfill material between the substrate and the semiconductor chip can be suppressed. Drawings Fig. 1 (a) to 1 (C) are schematic views illustrating a step of a manufacturing process of a semiconductor device according to an embodiment of the present disclosure. Fig. 2 is a schematic configuration diagram of a substrate processing apparatus used in a spacer film forming process according to an embodiment of the present disclosure. Fig. 3 is a block diagram for explaining a control structure of a substrate processing apparatus used in a spacer film forming process according to an embodiment of the present disclosure. Fig. 4 is a flowchart showing an example of a spacer film forming process according to an embodiment of the present disclosure. Fig. 5 (a) and 5 (B) are schematic views illustrating a step of the manufacturing process of the semiconductor device according to the second embodiment of the present disclosure. Fig. 6 (a) and 6 (B) are schematic views illustrating a step of the manufacturing process of the semiconductor device according to the third embodiment of the present disclosure. Fig. 7 (a) to 7 (C) are schematic views illustrating a step of the manufacturing process of the semiconductor device according to the fifth embodiment of the present disclosure. Detailed Description Hereinafter, an embodiment of the present disclosure will be described mainly with reference to fig. 1 to 7. The drawings used in the following description are schematic, and the dimensional relationships of the elements and the ratios of the elements shown in the drawings do not necessarily coincide with those of the actual drawings. In addition, the dimensional relationship of the elements, the ratio of the elements, and the like are not necessarily identical among the drawings. In the drawings, substantially the same elements are denoted by the same reference numerals, and the description of the elements is given in the drawings in which the elements first appear, and the description thereof is omitted unless otherwise required in the subsequent drawings. The present disclosure is not limited to the following embodiments, and can be implemented with appropriate modifications within the scope of the present disclosure. (1) Manufacturing process of semiconductor device First, a process of the manufacturing process of the semiconductor device 101 according to one embodiment of the present disclosure will be described in detail with reference to fig. 1 (a) to 1 (C). (Spacer film Forming step, step S1) As shown in fig. 1a, at least one insulating film 16 is formed in a conformal manner by using the substrate 10 and at least the first surface, the second surface, and the surface of the microbump 14 of the semiconductor chip 12, which are bonded to the surface of the substrate 10 on the bonding surface side with the semiconductor chip 12 (hereinafter, also referred to as a first surface) and the surface of the microbump 14 of the semiconductor chip 12 (hereinafter, also referred to as a second surface) which are formed on the bonding surface side with the substrate 10 of the semiconductor chip 12, respectively, as shown in fig. 1B. Although not shown here,