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CN-224203521-U - Double-host glasses framework capable of multiplying power

CN224203521UCN 224203521 UCN224203521 UCN 224203521UCN-224203521-U

Abstract

The utility model discloses a double-host glasses framework for computing force multiplication, which belongs to the technical field of image processing, wherein two groups of Soc host units which are in local closed-loop operation are arranged in the glasses framework, the two groups of Soc host units are respectively used for independently processing left and right eye images, a high-speed data link is arranged between the Soc host units, the Soc host units bear the image processing task corresponding to a single eye, the two groups of independent Soc host units are respectively used for parallelly processing the left and right eye image data to form local closed loops, and the high-speed data link only used for transmitting control information is utilized for cooperative work, so that computing force multiplication is realized while decoupling the two-eye pixel paths, display delay is obviously reduced, and redundancy safety of a system is improved.

Inventors

  • DING ZHENHU
  • JIANG CONGCONG
  • CHEN YI

Assignees

  • 安徽阿凡达三界外科技有限公司

Dates

Publication Date
20260505
Application Date
20260302

Claims (7)

  1. 1. The utility model provides a double-host glasses framework that power is multiplied, includes the glasses frame, its characterized in that is equipped with the Soc host computer unit of two sets of local closed-loop operations in the glasses frame, and two sets of Soc host computer units independently handle the image of controlling the eye respectively, be equipped with high-speed data link between the Soc host computer unit, soc host computer unit bears the image processing task of corresponding monocular.
  2. 2. The dual-host eyewear architecture of claim 1, wherein the high-speed data link is used only to handle control information interaction between two groups of Soc host units, the high-speed data link including, but not limited to, at least one of pci express-based wired links, USB-based wired links, and inter-chip high-speed interconnects conforming to the UCIe standard.
  3. 3. The power multiplying dual host eyeglass architecture of claim 1, wherein a display assembly is further disposed within the eyeglass frame, the display assembly configured to receive and display an image signal of a Soc host unit.
  4. 4. The power multiplication dual-host glasses architecture according to claim 1, wherein the Soc host units respectively correspond to at least one group of display components, the Soc host units are electrically connected to the corresponding display components, and the Soc host units and the corresponding display components form a local hardware path for monocular image processing and display, forming a local closed-loop operation of the Soc host unit display.
  5. 5. The power multiplying dual host eyewear architecture of claim 1, further comprising a power supply unit comprising a battery module mounted on the eyewear frame, and wherein the battery module is electrically connected to the Soc host unit and display assembly.
  6. 6. The power multiplying dual host eyewear architecture of claim 5, wherein the power supply unit includes, but is not limited to, a built-in battery and an external power supply structure.
  7. 7. The power multiplication dual-host eyeglass architecture of claim 1, wherein the Soc host units are symmetrically disposed within the eyeglass frame, and wherein heat dissipation assemblies are disposed within the eyeglass frame and are attached to the Soc host units.

Description

Double-host glasses framework capable of multiplying power Technical Field The utility model relates to the technical field of image processing, in particular to a double-host glasses framework with multiplied computing power. Background With the rapid development of near-eye display technology and Augmented Reality (AR), virtual Reality (VR), and video perspective (VST) technology, wearable display devices are increasingly in demand for image resolution and refresh rate. In pursuit of extreme immersion and realism, monocular 4K resolution and refresh rates of 90Hz and higher have become the dominant standards in the industry. In the prior art, as in the patent document of chinese patent publication No. CN114488507a, a wearable display device for microscopic observation is disclosed. The wearable display device for binocular microscope observation comprises a wearable display, two video sensing heads and an image processor, wherein the wearable display is provided with two display screens for binocular observation, the video sensing heads are provided with mounting bayonets which can be respectively and directly mounted on ocular lenses of any binocular microscope to acquire image information, the image information acquired through the two ocular lenses is respectively sent to the external host computer) to be processed by the image processor, and video signals output by the image processor can be respectively passed through the display screens in the wearable display device for binocular observation, so that an observer can remotely observe images in the ocular lenses without any reconstruction of the binocular microscope. The communication port of the external host can be connected with a remote server to realize remote technical cooperation. Existing wearable display devices mostly employ a single host (Soc) architecture. Under the framework, a single chip is required to drive a left display unit and a right display unit simultaneously through multiple interfaces. With the improvement of resolution, in the conventional single-host solution, all tasks such as image rendering, ISP (image signal processing) and geometric correction compete for the computing resources in the same Soc. When processing ultra-high definition pixel data, the bus bandwidth and memory controller inside the Soc often become bottlenecks, resulting in the system having to maintain operation by reducing image quality or sacrificing frame rate, severely affecting the visual experience. Meanwhile, the end-to-end delay is too high, in a single host architecture, two paths of image signals are multiplexed in sequence or in a time-sharing manner in processing logic, so that serious queuing effect is generated in processing cache of image data, and for VST equipment, the too high delay can cause hysteresis of a picture perceived by a user relative to physical action, so that serious vision motion sickness is caused. And a single host is used as the only control core of the whole machine, and once power failure or work stop occurs due to overheat, overload or hardware faults, the synchronization of binocular pictures is directly lost, and even the whole machine is in a black screen state. In application scenes with extremely high requirements on real-time performance, such as industry, medical treatment or driving, the design lacking redundancy has obvious potential safety hazards. Meanwhile, from the industrial point of view, the self-grinding special chip and the independent production line can deeply customize the path, but the investment is high, the period is long, the risk is concentrated and the process iteration is difficult to follow in time, in contrast to the fact, the mobile phone industry chain is high in maturity, the general system level chip is updated quickly, the tool chain and the driving ecology are complete, if the coupling of the two eyes on the pixel path is firstly released in the system architecture level, each eye occupies a complete acquisition, processing and display closed loop, the improvement on the resolution, the frame rate and the time delay of the general chip can be directly received, the improvement on the aspect of lower marginal cost is synchronously obtained, meanwhile, the space of the subsequent expansion capacity through the high-speed interconnection standard is reserved, the open interconnection standard facing the core granulation trend is also rapidly evolved, and a maturation path is provided for the on-chip interconnection and control surface communication which are connected with higher speed in the packaging level in the future. Disclosure of utility model In order to solve the problems, the utility model provides a double-host glasses framework with multiplied computation force, which is characterized in that two groups of independent Soc host units are used for respectively processing image data of left eyes and right eyes in parallel to form a local closed loop, and a high-speed data link