CN-224205565-U - Packaging structure of superconducting quantum chip and electronic equipment

Abstract

The application provides a packaging structure of a superconducting quantum chip and electronic equipment, and relates to the technical field of superconducting quanta. The problem that the functional circuit of the superconducting quantum chip is oxidized in the packaging process is solved by the double airtight packaging mode, the surface loss and the material related loss of the superconducting quantum chip are restrained, the high performance of the superconducting quantum chip is ensured, and the packaging reliability of the superconducting quantum chip is improved. Meanwhile, moisture, oxygen, pollutants and the like can be effectively isolated, and the problem that the functional circuit of the superconducting quantum chip is oxidized and deteriorated due to contact with the atmosphere in the preservation process is avoided, so that the problems of working parameter change, performance reduction and service life attenuation of the superconducting quantum chip are avoided. And can prevent the oxidation and chemical corrosion of the superconducting material of the superconducting quantum chip in the low-temperature environment, promote the long-term stability of the superconducting quantum chip in the dilution refrigerator, thus has improved the low-temperature performance of the superconducting quantum chip.

Inventors

• HU JINYAO
• MENG TIEJUN
• LIANG XIAO

Assignees

• 深圳量旋科技有限公司

Dates

Publication Date

20260505

Application Date

20250526

Claims (10)

1. 1. A packaging structure of a superconducting quantum chip, comprising: The superconducting quantum chip comprises a functional circuit area and an edge sealing area surrounding the functional circuit area on one side surface of the superconducting quantum chip; The control chip is arranged opposite to the superconducting quantum chip, and a first welding point of the control chip is welded with a welding point of the functional circuit area; The sealing glue ring is positioned between the superconducting quantum chip and the control chip, and is correspondingly arranged in the edge sealing area, a first sealing cavity is formed among the superconducting quantum chip, the sealing glue ring and the control chip, and the first welding spot is positioned in the first sealing cavity; The packaging box comprises a box body and a cover plate, wherein a second sealing cavity is formed by welding the cover plate with an opening of the box body, the superconducting quantum chip, the sealing glue ring and the control chip are all located in the second sealing cavity, a second welding spot of the control chip is welded with a welding spot in the box body, and at least one of the first sealing cavity and the second sealing cavity is filled with inert gas.
2. 2. The packaging structure of superconducting quantum chip of claim 1, wherein the inert gas comprises at least one of nitrogen, helium and argon.
3. 3. The packaging structure of the superconducting quantum chip according to claim 1, wherein the first welding spot is located on a side surface of the control chip facing the superconducting quantum chip, and the second welding spot is located on a side surface of the control chip facing away from the superconducting quantum chip.
4. 4. The packaging structure of the superconducting quantum chip according to claim 1, wherein the first welding spot and the second welding spot are located on a surface of the control chip, which faces the superconducting quantum chip, and the second welding spot is located outside the first sealing cavity.
5. 5. The packaging structure of the superconducting quantum chip according to claim 1, wherein the first welding spot and part of the second welding spot are located on a side surface of the control chip facing the superconducting quantum chip, the rest of the second welding spot is located on a side surface of the control chip facing away from the superconducting quantum chip, and the second welding spot located on the same side surface of the control chip as the first welding spot is located outside the first sealing cavity.
6. 6. The packaging structure of the superconducting quantum chip according to claim 4 or 5, wherein the second welding spot and the first welding spot are wire-bonded and welded with welding spots in the packaging box when the control chip faces to one side surface of the superconducting quantum chip.
7. 7. The package structure of the superconducting quantum chip of claim 1, wherein the solder of the first solder joint with the solder joint of the functional wiring region includes In.
8. 8. The package structure of the superconducting quantum chip of claim 1, wherein the solder of the second solder joint to the solder joint In the package box comprises In.
9. 9. The packaging structure of the superconducting quantum chip of claim 1, wherein the material of the sealing glue ring comprises photoresist.
10. 10. An electronic device comprising the packaging structure of the superconducting quantum chip of any one of claims 1-9.

Description

Packaging structure of superconducting quantum chip and electronic equipment Technical Field The application relates to the technical field of superconducting quanta, in particular to a packaging structure of a superconducting quanta chip and electronic equipment. Background The core function of the superconducting quantum chip depends on the superconducting characteristics of microstructures such as Josephson junctions and the like, and a material system (such as aluminum, niobium and titanium nitride) of the superconducting quantum chip is extremely easy to react with oxygen and water vapor in the environment at normal temperature to generate insulating oxide (such as Al 2O3、NbOx). Particularly, when packaging superconducting quantum chips, the chips are inevitably exposed to a conventional environment, so that the defect that the chip lines are oxidized is caused. The oxide layer formed by oxidation in the environment can obviously increase the interface defect density, so that the reliability of the superconducting quantum chip is reduced, such as the change of some working parameters including the shortening of the coherence time of quantum bits, the reduction of the quality factor of a resonant cavity and the like, and even the irreversible damage such as quantum state leakage and the like is caused. Therefore, how to improve the oxidation of the chip circuit during the packaging process of the superconducting quantum chip is one of the main research directions of the research personnel today. Disclosure of utility model In view of the above, the application provides a packaging structure of a superconducting quantum chip and an electronic device, which effectively solve the existing technical problems, improve the problem that functional circuits of a functional circuit area of the superconducting quantum chip are oxidized in the packaging process, and improve the packaging reliability and low-temperature performance of the superconducting quantum chip. In order to achieve the above purpose, the technical scheme provided by the application is as follows: A packaging structure of a superconducting quantum chip, comprising: The superconducting quantum chip comprises a functional circuit area and an edge sealing area surrounding the functional circuit area on one side surface of the superconducting quantum chip; The control chip is arranged opposite to the superconducting quantum chip, and a first welding point of the control chip is welded with a welding point of the functional circuit area; The sealing glue ring is positioned between the superconducting quantum chip and the control chip, and is correspondingly arranged in the edge sealing area, a first sealing cavity is formed among the superconducting quantum chip, the sealing glue ring and the control chip, and the first welding spot is positioned in the first sealing cavity; The packaging box comprises a box body and a cover plate, wherein a second sealing cavity is formed by welding the cover plate with an opening of the box body, the superconducting quantum chip, the sealing glue ring and the control chip are all located in the second sealing cavity, a second welding spot of the control chip is welded with a welding spot in the box body, and at least one of the first sealing cavity and the second sealing cavity is filled with inert gas. Optionally, the inert gas includes at least one of nitrogen, helium and argon. Optionally, the first welding spot is located on a surface of the control chip facing to one side of the superconducting quantum chip, and the second welding spot is located on a surface of the control chip facing away from one side of the superconducting quantum chip. Optionally, the first welding spot and the second welding spot are both located on a surface of the control chip facing one side of the superconducting quantum chip, the second welding spot is located outside the first sealing cavity, and the second welding spot located on a surface of the same side of the control chip as the first welding spot is located outside the first sealing cavity. Optionally, the first welding spot and part of the second welding spot are both located on one side surface of the control chip facing the superconducting quantum chip, and the rest of the second welding spot is located on one side surface of the control chip facing away from the superconducting quantum chip. Optionally, when the second welding spot and the first welding spot are located on one side surface of the control chip facing the superconducting quantum chip, the second welding spot is wire-bonded and welded with the welding spot in the packaging box. Optionally, the solder for soldering the first solder joint and the solder joint of the functional circuit area includes In. Optionally, the second solder joint and the solder joint In the packaging box are soldered with each other, and the solder comprises In. Optionally, the material of the sealant ring includes photoresist. Based