CN-224217010-U - Long-distance I2C bus signal enhancement circuit capable of intelligently suppressing signal reflection

Abstract

The utility model relates to the technical field of I 2 C communication, in particular to a long-distance I 2 C bus signal enhancement circuit capable of intelligently inhibiting signal reflection. The circuit comprises a micro control unit, an I 2 C bus and a slave, wherein the slave is connected with the I 2 C bus through a common mode choke coil, the I 2 C bus is connected with the micro control unit through a resistance matching network and a repeater in sequence, a data line of the I 2 C bus is also connected with the micro control unit through a differential voltage feedback circuit and used for dynamically monitoring an I 2 C bus data signal, and a driving end of the resistance matching network is connected with the micro control unit. The utility model suppresses common mode interference through the common mode choke coil, isolates parasitic capacitance and parasitic inductance through the repeater, optimizes the slope of the signal edge, adjusts the circuit resistance in real time through the resistance matching network and the differential voltage feedback circuit, suppresses the phenomena of signal reflection and offset, and effectively improves the quality of signals.

Inventors

• YANG TAO
• YU MINGWEI
• XIA YANFEI
• SU DEYU
• LIU YANG

Assignees

• 山东天星北斗信息科技有限公司

Dates

Publication Date

20260508

Application Date

20250516

Claims (5)

1. 1. The long-distance I 2 C bus signal enhancement circuit capable of intelligently suppressing signal reflection comprises a micro control unit, an I 2 C bus and a slave machine, and is characterized in that the slave machine is connected with the I 2 C bus through a common mode choke coil, the I 2 C bus is sequentially connected with the micro control unit through a resistance matching network and a repeater, a data line of the I 2 C bus is further connected with the micro control unit through a differential voltage feedback circuit and used for dynamically monitoring an I 2 C bus data signal, and a driving end of the resistance matching network is connected with the micro control unit and used for dynamically adjusting the resistance value of the resistance matching network according to the fed-back condition of the I 2 C bus data signal.
2. 2. The intelligent suppression signal reflection long-distance I 2 C bus signal enhancement circuit according to claim 1, wherein the slave is provided with an SDA pin and an SCL pin, one end of the common mode choke is respectively connected with the SDA pin and the SCL pin of the slave, and the other end is respectively connected with the first data line and the first clock line.
3. 3. The intelligent suppression signal reflection long-distance I 2 C bus signal enhancement circuit according to claim 2, wherein the resistor matching network includes two branches, each branch includes an electronic load and a fixed resistor, a W pin of one electronic load is connected with a first data line, an L pin of the other electronic load is led out of a second data line through the fixed resistor, a W pin of the other electronic load is connected with a first clock line, an L pin of the other electronic load is led out of a second clock line through the fixed resistor, and SCLK pin, DIN pin and CS# pin of the two electronic loads are connected with P0.03/AIN1 pin, P0.04/AIN2 pin and P0.05/AIN3 pin of the micro control unit through IIC_SCL_R pin, IIC_SDA_R pin and CS pin, respectively.
4. 4. The intelligent suppression signal reflection long-distance I 2 C bus signal enhancement circuit according to claim 3, wherein SCLA pin and SDAA pin of the repeater are respectively connected with a second clock line and a second data line, and SCLB pin and SDAB pin of the repeater are respectively connected with P0.26 pin and P0.27 pin of the micro-control unit through a third clock line and a third data line.
5. 5. The intelligent signal reflection suppressing long-distance I 2 C bus signal enhancement circuit according to claim 2, wherein the differential voltage feedback circuit includes a differential amplifier and an operational amplifier, the non-inverting input terminal of the differential amplifier is connected to the first data line, the inverting input terminal thereof is grounded, the output terminal thereof is connected to the non-inverting input terminal of the operational amplifier, the inverting input terminal thereof is connected to the output terminal thereof, and the output terminal thereof is connected to the P0.02/AIN0 pin of the micro control unit via a filter circuit.

Description

Long-distance I 2 C bus signal enhancement circuit capable of intelligently suppressing signal reflection Technical Field The utility model relates to the technical field of I 2 C communication, in particular to a long-distance I 2 C bus signal enhancement circuit capable of intelligently inhibiting signal reflection. Background In an industrial Internet of things sensor networking scene, long-distance I 2 C transmission faces the problem of signal integrity deterioration, a wiring harness exceeding 1 meter introduces parasitic capacitance exceeding 150pF and characteristic impedance exceeding 80 omega, so that the rising time of an I 2 C signal exceeds 200ns, the edge slope is lower than 0.5V/mu s and violates a bus specification, meanwhile, the problem of noise coupling exacerbation exists, mechanical vibration and an electromagnetic environment introduce 50 kHz-1 MHz common mode noise, the peak-to-peak value reaches 200mV, and the signal-to-noise ratio is reduced to raise the data error rate. The prior art adopts fixed resistance switching matching, cannot dynamically adapt to the fluctuation of wire harness impedance, does not integrate the collaborative design of signal shaping and high-frequency filtering, and is difficult to meet the reliability requirement of long-distance I 2 C transmission. Disclosure of Invention In order to solve the problems, the utility model provides a long-distance I 2 C bus signal enhancement circuit which can monitor and feed back the signal condition in the circuit, adjust the matching resistance in real time and reduce the signal offset and reflection. The specific scheme of the utility model is as follows: The long-distance I 2 C bus signal enhancement circuit capable of intelligently suppressing signal reflection comprises a micro control unit, an I 2 C bus and a slave, wherein the slave is connected with the I 2 C bus through a common mode choke coil, the I 2 C bus is sequentially connected with the micro control unit through a resistance matching network and a repeater, a data line of the I 2 C bus is further connected with the micro control unit through a differential voltage feedback circuit and is used for dynamically monitoring an I 2 C bus data signal, and a driving end of the resistance matching network is connected with the micro control unit and is used for dynamically adjusting the resistance value of the resistance matching network according to the fed-back condition of the I 2 C bus data signal. Aiming at the defects existing in the long cable transmission process with the length of more than 1 meter, a common mode choke coil, a resistance matching network, a repeater and a differential voltage feedback circuit are added in the circuit, common mode interference is restrained through a triple mechanism of common mode noise suppression, dynamic threshold judgment and dynamic adjustment of the resistance matching network, the rising/falling time of signals is shortened, and sampling errors caused by edge deterioration caused by capacitive loads are effectively avoided. Because the slave is installed outside the equipment and needs to be connected with circuits in the equipment through a long section of cable, significant distributed capacitance (about 100-200 pF/m) and inductance (about 0.5-1 mu H/m) can be generated, so that the rising/falling edge time of a signal is prolonged (for example, 1.5 wire increases the rising time from standard 100ns to more than 220 ns), the edge slope is lower than the bus specification requirement (for example, < 0.5V/mu s), and even MCU sampling errors are triggered. The utility model sets a common mode choke coil at the output end of the slave machine, the slave machine is provided with an SDA pin and an SCL pin, one end of the common mode choke coil is respectively connected with the SDA pin and the SCL pin of the slave machine, and the other end is respectively connected with a first data line and a first clock line. The physical layer filtering mechanism of the common mode choke is utilized to pointedly solve the common mode noise pollution problem in I 2 C long-line transmission, and plays a key role in improving the anti-interference capability of a bus and prolonging the reliable transmission distance (the effective communication distance can be extended from 1.5 meters to 3-5 meters). Because the characteristic impedance of the cable is seriously not matched with the IIC standard pull-up resistor, signal reflection is caused, overshoot and undershoot are generated, the overshoot amplitude can reach 30% of the power supply voltage, and logic level misjudgment is caused. The utility model is characterized in that the resistor matching network is connected in series with the data line and the clock line of I 2 C, and comprises two branches, wherein each branch comprises an electronic load and a fixed resistor, a W pin of one electronic load is connected with a first data line, an L pin of the other electronic load is led