CN-224218377-U - Delay precision improving circuit suitable for electronic detonator

CN224218377UCN 224218377 UCN224218377 UCN 224218377UCN-224218377-U

Abstract

The utility model discloses a delay precision improving circuit suitable for an electronic detonator, the circuit is composed of an oscillator, a square wave counting module, a monitoring module and a clock calibration and error compensation module. The square wave counting module counts the square wave edges of the bus and compares the square wave edges with the delay reference value, and the starting and ending of the first calibration mode are controlled according to the comparison result. The monitoring module is responsible for monitoring the time interval between adjacent edges of the square wave, judging that the bus has no square wave when the time interval exceeds a set value but no next edge appears, and switching to the second calibration mode, so that smooth switching of the two calibration modes is realized. The clock calibration and error compensation module counts the oscillator in the calibration process, performs error compensation or amplification after error compensation on the data calibrated in the two calibration modes respectively, and finally takes the compensated value as an ignition timing value. By means of error compensation, delay precision is greatly improved, and meanwhile, the scheme capable of switching the calibration mode can also give consideration to the calibration efficiency.

Inventors

XU WEILIN
FAN LUYI
CHENG WEI
GUO YONG
LI HAIOU
ZHANG JINBIAO
CHEN QING
JIANG PINQUN

Assignees

桂林电子科技大学

Dates

Publication Date: 20260508
Application Date: 20250523

Claims (5)

1. The delay precision improving circuit suitable for the electronic detonator is characterized by comprising an oscillator, a square wave counting module, a monitoring module and a clock calibration and error compensation module; The square wave counting module comprises a time delay reference register, a square wave edge register and a counter 1, the monitoring module comprises a set value register and a counter 2, and the clock calibration and error compensation module comprises a counter 3, a counter 4, a time delay reference register, an error compensation register 1 and an error compensation register 2; The output end clock signal clk of the oscillator is connected with the clock signal input end of the square wave counting module, the monitoring module and the clock calibration and error compensation module, the input end of the square wave counting module is connected with the clock calibration enabling signal clk_cal_en, the bus square wave din, the clock signal clk output by the oscillator and the stop signal stop_en output by the monitoring module, the output end counting enabling signal flag cal and the square wave edge value data_w of the square wave counting module are connected with the input end of the clock calibration and error compensation module, the input end of the monitoring module is connected with the bus square wave din and the clock signal clk output by the oscillator, the output end stop signal stop_en of the monitoring module is connected with the input end of the square wave counting module, the set value F is connected with the input end of the clock calibration and error compensation module, the clock signal clk_cal_en output by the oscillator, the count enabling signal clk_cal and the square wave edge value data_w output by the square wave counting module and the set value F output by the monitoring module; The system comprises a square wave counting module, a monitoring module, a clock calibration and error compensation module, a counter 2, a counter 3 and a counter 4, wherein the square wave counting module is used for counting the edges of a bus square wave, namely generating square wave edge values and generating a counting enabling signal flag cal to control the start and stop of calibration, the monitoring module is used for counting the oscillator when receiving a bus square wave non-edge signal and generating a stopping signal to stop calibration when the counting value exceeds a set value, the clock calibration and error compensation module is used for counting the oscillator when receiving a high-level counting enabling value, stopping counting when receiving a low-level counting enabling value, and amplifying the counting result according to the current mode after error compensation or error compensation to be used as a final ignition timing value.
2. The delay precision improving circuit for the electronic detonator according to claim 1 is characterized in that the counter 1 receives a bus square wave din for counting edges of the bus square wave, and the counter 2, the counter 3 and the counter 4 are connected with an oscillator for counting a clock clk output by the oscillator.
3. The delay precision improving circuit for electronic detonator according to claim 1, wherein the square wave counting module counts the edge value of the bus square wave, sends a count enable signal flag_cal to the clock calibration and error compensation module when the first edge is received, the counter 3 and the counter 4 count the clock clk output by the oscillator, pull down the count enable signal flag_cal when the square wave edge value is equal to the delay reference value, the counter 3 and the counter 4 stop counting, assign the value of the counter 3 to the error compensation register 1 for error compensation, and the compensated value is taken as the ignition timing value.
4. The delay precision improving circuit for electronic detonator according to claim 1, wherein the monitoring module counts the oscillator by using the counter 2 when receiving the bus square wave non-edge signal, and sets the counter 2 to zero when receiving the bus square wave edge signal, so as to achieve the purpose of monitoring the time interval between the adjacent edges of the bus square wave, when the value of the counter 2 is greater than the set value F, the monitoring module sends a stop signal stop_en to the square wave counting module, pulls down the count enable signal flag_cal, the counter 3 and the counter 4 stop counting, the value of the counter 4 is given to the error compensation register 2 to amplify according to the error compensation and amplification formula, and the compensated and amplified value is used as the ignition timing value.
5. The delay precision improving circuit for electronic detonator as claimed in claim 4 wherein said set value F is a value stored in advance in a set value register, which must be greater than the number of oscillator clocks contained between two adjacent edges of the bus square wave, so as to perform the monitoring function.

Description

Delay precision improving circuit suitable for electronic detonator Technical Field The utility model relates to the technical field of integrated circuits, in particular to a delay precision improving circuit suitable for an electronic detonator. Background The electronic detonator is mainly applied to the fields of building blasting, mine, drilling, military, geological exploration and the like. In practical application, hundreds or even thousands of power generation sub-detonator network are usually required to be blasted, the detonation time of each power generation sub-detonator needs to be accurately controlled, high delay precision is required, the prior method usually carries out clock calibration on the detonator after networking, the calibration method mainly comprises the steps that the detonator sends square waves to the detonator through a bus, the detonator counts the square waves, and after the count value is equal to a delay reference value stored in the detonator in advance, the count value of the oscillator is stored in a register to be used as a final ignition detonation timing value. The method is that the bus emits fewer square waves, the detonator is also used for counting the square waves, when the count value is smaller than the delay reference value and the bus has no square waves, the count value of the oscillator is amplified proportionally and then used as the final ignition initiation timing value, and the method improves the efficiency compared with the conventional method, but introduces errors, so that the delay precision is reduced. Therefore, a clock calibration method which not only improves efficiency, but also gives consideration to delay precision needs to be designed. Disclosure of utility model The utility model aims to solve the problem of reducing delay errors introduced by the system design problem while improving the clock calibration efficiency, and provides a delay precision improving circuit suitable for an electronic detonator. In order to solve the problems, the utility model designs the following technical scheme: The delay precision improving circuit suitable for the electronic detonator comprises an oscillator, a square wave counting module, a monitoring module and a clock calibration and error compensation module, wherein the square wave counting module comprises a delay reference register, a square wave edge register and a counter 1, the monitoring module comprises a set value register and a counter 2, and the clock calibration and error compensation module comprises a counter 3, a counter 4, the delay reference register, the error compensation register 1 and the error compensation register 2. In the above scheme, the clock calibration enable signal clk_cal_en is respectively connected to the clock calibration enable input ends of the square wave counting module and the monitoring module; the clock signal clk at the output end of the oscillator is connected with the clock signal input ends of the square wave counting module, the monitoring module and the clock calibration and error compensation module, the input end of the square wave counting module is connected with the clock calibration enabling signal clk_cal_en, the bus square wave din, the clock signal clk output by the oscillator and the stop signal stop_en output by the monitoring module, the output end counting enabling signal flag cal and the square wave edge value data_w of the square wave counting module are connected with the input end of the clock calibration and error compensation module, the input end of the monitoring module is connected with the bus square wave din and the clock signal clk output by the oscillator, the output end stop signal stop_en and the set value F of the monitoring module are respectively connected with the input ends of the square wave counting module and the clock calibration and error compensation module, the clock signal clk_cal_en output by the oscillator, the count enabling signal g_cal and the square wave edge value data_w output by the square wave counting module and the set value F output by the monitoring module, and the output end of the clock calibration and error compensation module outputs the ignition value data_delay. In the scheme, the counter 1 of the square wave counting module counts the edges of the bus square wave, the counter 2 of the monitoring module counts the oscillator, and the counter 3 and the counter 4 of the clock calibration and error compensation module count the oscillator. In the above scheme, the square wave counting module is configured to calculate an edge value data_w of the bus square wave din, send a count enable signal flag_cal to the clock calibration and error compensation module when detecting the first square wave edge of the bus, and pull down the count enable signal flag_cal sent to the clock calibration and error compensation module when the edge value data_w is equal to the delay reference value del_ref or when rec