CN-224218745-U - Heterojunction battery piece and production facility thereof
Abstract
The utility model provides a heterojunction battery piece and production equipment thereof, wherein the heterojunction battery piece comprises an N-type silicon wafer, a first intrinsic amorphous silicon layer formed on the front surface of the N-type silicon wafer, an N-type doped microcrystalline silicon layer formed on the front surface of the first intrinsic amorphous silicon layer, a first transparent conductive film layer formed on the front surface of the N-type doped microcrystalline silicon layer, an electrode formed on the front surface of the first transparent conductive film layer, a second intrinsic amorphous silicon layer formed on the back surface of the N-type silicon wafer, a P-type doped microcrystalline silicon layer formed on the back surface of the second intrinsic amorphous silicon layer, a second transparent conductive film layer formed on the back surface of the P-type doped microcrystalline silicon layer, a third transparent conductive film layer formed on the back surface of the second transparent conductive film layer, a copper film layer formed on the whole back surface of the third transparent conductive film layer and a protective layer formed on the back surface of the copper film layer.
Inventors
- HU LEIZHEN
- Qian Yizhu
- ZHANG HUIGUO
- ZHANG LEI
- HAN ZHIDA
Assignees
- 江苏科来材料科技有限公司
Dates
- Publication Date
- 20260508
- Application Date
- 20250515
Claims (10)
- 1. The heterojunction battery piece is characterized by comprising an N-type silicon wafer, a first intrinsic amorphous silicon layer formed on the front surface of the N-type silicon wafer, an N-type doped microcrystalline silicon layer formed on the front surface of the first intrinsic amorphous silicon layer, a first transparent conductive film layer formed on the front surface of the N-type doped microcrystalline silicon layer, an electrode formed on the front surface of the first transparent conductive film layer, a second intrinsic amorphous silicon layer formed on the back surface of the N-type silicon wafer, a P-type doped microcrystalline silicon layer formed on the back surface of the second intrinsic amorphous silicon layer, a second transparent conductive film layer formed on the back surface of the P-type doped microcrystalline silicon layer, a third transparent conductive film layer formed on the back surface of the second transparent conductive film layer, a copper film layer formed on the whole back surface of the third transparent conductive film layer and a protective layer formed on the back surface of the copper film layer.
- 2. The heterojunction cell of claim 1, wherein the first transparent conductive film layer and the second transparent conductive film layer are made of indium tin oxide, and the third transparent conductive film layer is made of aluminum-doped zinc oxide or tin oxide.
- 3. The heterojunction cell of claim 1, further comprising a seed layer between the third transparent conductive film layer and the copper film layer, wherein the seed layer is made of titanium or nickel, and the thickness of the seed layer is 5-30nm; The material of the protective layer is tin or silver.
- 4. The heterojunction cell of claim 1, wherein the electrode is made of silver or low-temperature silver-coated copper paste.
- 5. The heterojunction cell according to any one of claims 1 to 3, wherein the thickness of the second transparent conductive film layer is 10-50nm; the thickness of the third transparent conductive film layer is 50-100nm.
- 6. A heterojunction cell as claimed in any one of claims 1 to 3 wherein: The thickness of the copper film layer is 0.5-10 mu m, and/or the resistivity of the copper film layer is less than or equal to 2.0 mu omega cm; The thickness of the protective layer is 0.1-1 mu m.
- 7. The heterojunction cell of any one of claims 1 to 3, wherein the front surface of the N-type silicon wafer is textured, and the roughness of the back surface is less than or equal to 0.3 μm.
- 8. The heterojunction cell as claimed in any one of claims 1 to 3, wherein the thickness of the N-type silicon wafer is 90-120 μm; the thickness of the first and second intrinsic amorphous silicon layers is independently 5-10nm, and/or, The thickness of the N-type doped microcrystalline silicon layer is 10-25nm, and/or, The thickness of the P-type doped microcrystalline silicon layer is 15-30nm, and/or, The first transparent conductive film layer has a thickness of 70-110nm, and/or, The width of each electrode is 15-30 μm, and the height is 5-12 μm.
- 9. A production device for producing the heterojunction cell as claimed in any one of claims 1 to 8, which is characterized by comprising a texturing cleaning device, an enhanced plasma chemical vapor deposition device, a physical vapor deposition device, a magnetron sputtering device or a thermal evaporation device, an electroplating device or a sputtering device and a screen printing device which are connected in sequence.
- 10. The apparatus of claim 9, wherein the cleaning apparatus comprises a texturing module and an alkaline chemical polishing module.
Description
Heterojunction battery piece and production facility thereof Technical Field The utility model belongs to the technical field of photovoltaic products, and particularly relates to a heterojunction battery piece and production equipment thereof. Background This section is intended to provide a background or context to the embodiments of the utility model that are recited in the claims. The description herein is not admitted to be prior art by inclusion in this section. With the increasing global demand for clean energy, solar photovoltaic power generation has received a great deal of attention as an efficient and environment-friendly energy solution. Among the solar cell technologies, heterojunction (WITH THIN FILM, HJT) cells are becoming one of the research hotspots in the photovoltaic field due to their unique structure and excellent photoelectric conversion performance. The heterojunction cell is generally structured by first depositing a thin intrinsic amorphous silicon film (i-a-Si: H) and a p-type doped microcrystalline silicon film (p-a-Si: H) on the front side of an N-type monocrystalline silicon wafer (c-Si), then depositing a thin intrinsic amorphous silicon film (i-a-Si: H) and an N-type doped microcrystalline silicon film (N-a-Si: H) on the back side of the wafer to form a back surface field, then depositing transparent oxide conductive films (TRANSPARENT CONDUCTIVE OXIDE, TCO) on both sides of the cell by PVD, the TCO not only can reduce the series resistance at the time of collecting current but also can act as an anti-reflection effect, and finally making a metal electrode on the TCO. Although heterojunction cell has higher photoelectric conversion efficiency, the highest efficiency can reach more than 25.5%, there are still some disadvantages to be solved in practical application, which limit further improvement of performance and cost effectiveness. 1. Design for lack of internal reflection on back Most of the existing heterojunction battery pieces adopt a double-sided structure design, and the back surface of the existing heterojunction battery pieces lacks an internal reflection design. When light passes through the battery piece, light which is not absorbed can directly pass through the battery piece and cannot be reflected and absorbed secondarily. This design results in lower light utilization and insufficient exploitation of the photoelectric conversion potential of the battery cell, thereby limiting further improvement of the conversion efficiency. 2. The contact resistance between the back metal electrode and the blue membrane is high The contact resistance between the back metal electrode of the heterojunction cell and the blue membrane is high. Such high contact resistance may hinder the transport of carriers, resulting in increased electrical energy loss, which in turn affects the overall performance of the battery. In addition, the back electrode of the heterojunction cell is usually made of silver paste at present. Silver paste is not only costly, but also requires complicated processes and equipment during the manufacturing process, which further increases the production cost of the battery sheet. In the increasingly competitive background of the worldwide photovoltaic market, businesses face tremendous cost pressures and performance improvement demands. The ability to develop higher conversion efficiency, lower cost component products has become a key core technology for business survival and development in the global photovoltaic market. Therefore, aiming at the defects of the existing heterojunction battery piece, a heterojunction battery piece structure which can effectively improve the light utilization rate, reduce the contact resistance and has lower cost is developed, and the heterojunction battery piece structure has important practical significance and wide application prospect. Disclosure of Invention The utility model aims to provide a heterojunction cell with improved photoelectric conversion efficiency and reduced raw material cost and production equipment thereof. In order to achieve the above purpose, the utility model adopts the following technical scheme: The utility model provides a heterojunction battery piece, which comprises an N-type silicon wafer, a first intrinsic amorphous silicon layer formed on the front surface of the N-type silicon wafer, an N-type doped microcrystalline silicon layer formed on the front surface of the first intrinsic amorphous silicon layer, a first transparent conductive film layer formed on the front surface of the N-type doped microcrystalline silicon layer, an electrode formed on the front surface of the first transparent conductive film layer, a second intrinsic amorphous silicon layer formed on the back surface of the N-type silicon wafer, a P-type doped microcrystalline silicon layer formed on the back surface of the second intrinsic amorphous silicon layer, a second transparent conductive film layer formed on the back sur