CN-224218763-U - Light-emitting diode epitaxial wafer and light-emitting diode

Abstract

The utility model discloses a light-emitting diode epitaxial wafer and a light-emitting diode, wherein the light-emitting diode epitaxial wafer comprises a substrate, and a buffer layer, a U-GaN layer, an N-GaN layer, an insertion layer, a stress release layer, a multiple quantum well layer, an electron blocking layer and a P-GaN layer which are sequentially laminated on the substrate, wherein the insertion layer at least comprises a Si 3 N 4 layer. The luminous efficiency of the light-emitting diode provided by the utility model is obviously improved.

Inventors

• HU JIAHUI
• LIU CHUNYANG
• Jin Conglong
• GU WEI

Assignees

• 江西兆驰半导体有限公司

Dates

Publication Date

20260508

Application Date

20250512

Claims (10)

1. 1. The light-emitting diode epitaxial wafer is characterized by comprising a substrate, and a buffer layer, a U-GaN layer, an N-GaN layer, an insertion layer, a stress release layer, a multiple quantum well layer, an electron blocking layer and a P-GaN layer which are sequentially laminated on the substrate, wherein the insertion layer at least comprises a Si 3 N 4 layer.
2. 2. The light-emitting diode epitaxial wafer of claim 1, wherein the thickness of the insertion layer is 10 nm-100 nm.
3. 3. The light-emitting diode epitaxial wafer of claim 2, wherein the thickness of the insertion layer is 30 nm-70 nm.
4. 4. The light emitting diode epitaxial wafer of claim 1, wherein the interposer is a Si 3 N 4 layer.
5. 5. The light-emitting diode epitaxial wafer of claim 1, wherein the interposer comprises periodically alternating layers of Si 3 N 4 and InN.
6. 6. The led epitaxial wafer of claim 5, wherein the number of cycles of alternating layers of Si 3 N 4 and InN is 3 to 8 and the thickness ratio of Si 3 N 4 to InN is 1 (0.3 to 0.5) in each cycle.
7. 7. The light-emitting diode epitaxial wafer of claim 1, wherein the buffer layer comprises an AlN buffer layer, a GaN buffer layer and a three-dimensional GaN buffer layer which are sequentially stacked, wherein the AlN buffer layer is 10 nm-30 nm in thickness, the GaN buffer layer is 15 nm-35 nm in thickness, and the three-dimensional GaN buffer layer is 500 nm-2000 nm in thickness.
8. 8. The led epitaxial wafer of claim 1, wherein the stress relief layer comprises InGaN stress relief layers and GaN stress relief layers alternately stacked periodically for a period of 2-10 a, wherein the InGaN stress relief layers have a thickness of 1-3 nm and the GaN stress relief layers have a thickness of 15-30 nm in each period.
9. 9. The led epitaxial wafer of claim 1, wherein the multiple quantum well layers comprise InGaN well layers and GaN barrier layers alternately stacked periodically with an alternating stacking period of 6-14, the InGaN well layers having a thickness of 2-4 nm and the GaN barrier layers having a thickness of 8-12 nm in each period.
10. 10. A light emitting diode, characterized in that the light emitting diode comprises a light emitting diode epitaxial wafer according to any one of claims 1 to 9.

Description

Light-emitting diode epitaxial wafer and light-emitting diode Technical Field The present utility model relates to the field of semiconductor technologies, and in particular, to a light emitting diode epitaxial wafer and a light emitting diode. Background The light-emitting diode epitaxial wafer comprises a substrate and an epitaxial layer grown on the substrate, wherein the substrate is made of sapphire, silicon or silicon carbide and other materials. Due to the lattice mismatch and the difference of thermal expansion coefficients, a great amount of stress and defects can be generated in the epitaxial layer structure in the growth process, so that the internal quantum efficiency is influenced, and finally the luminous efficiency is influenced. For stress relief, an InGaN stress relief layer is typically provided before the multiple quantum well layer, however, the InGaN layer also stresses the GaN layer in the multiple quantum well layer, and thus the stress accommodation effect is limited. Disclosure of utility model The utility model aims to solve the technical problem of providing a light-emitting diode epitaxial wafer and a light-emitting diode, which can improve the brightness of the light-emitting diode. In order to solve the technical problems, the utility model discloses a light-emitting diode epitaxial wafer which comprises a substrate, and a buffer layer, a U-GaN layer, an N-GaN layer, an insertion layer, a stress release layer, a multiple quantum well layer, an electron blocking layer and a P-GaN layer which are sequentially laminated on the substrate, wherein the insertion layer at least comprises a Si 3N4 layer. As an improvement of the scheme, the thickness of the insertion layer is 10 nm-100 nm. As an improvement of the scheme, the thickness of the insertion layer is 30 nm-70 nm. As a modification of the above scheme, the insertion layer is a Si 3N4 layer. As a modification of the above, the insertion layer includes Si 3N4 layers and InN layers which are periodically alternately stacked. As an improvement of the scheme, the number of periods of alternate lamination of the Si 3N4 layer and the InN layer is 3-8, and the thickness ratio of the Si 3N4 layer to the InN layer in each period is 1 (0.3-0.5). As an improvement of the scheme, the buffer layer comprises an AlN buffer layer, a GaN buffer layer and a three-dimensional GaN buffer layer which are sequentially stacked, wherein the thickness of the AlN buffer layer is 10 nm-30 nm, the thickness of the GaN buffer layer is 15 nm-35 nm, and the thickness of the three-dimensional GaN buffer layer is 500 nm-2000 nm. The stress release layer comprises InGaN layers and GaN layers which are alternately laminated periodically, wherein the alternately laminated period is 5-14, the thickness of the InGaN layers is 2-4 nm, and the thickness of the GaN layers is 5-10 nm in each period. As an improvement of the scheme, the multi-quantum well layer comprises InGaN well layers and GaN barrier layers which are alternately laminated periodically, the alternate lamination period is 6-14, the thickness of the InGaN well layers is 2-4 nm in each period, and the thickness of the GaN barrier layers is 8-12 nm. Correspondingly, the utility model also discloses a light-emitting diode, which comprises the light-emitting diode epitaxial wafer. The utility model has the following beneficial effects that the utility model is provided with the insertion layer between the N-GaN layer and the stress release layer, and the insertion layer at least comprises the Si 3N4 layer. The Si 3N4 layer can absorb partial lattice distortion, reduce the extension propagation of defects and reduce dislocation density, and the thermal expansion coefficient of the Si 3N4 material is close to that of the epitaxial layer GaN material, so that the thermal mismatch stress can be reduced. Drawings Fig. 1 is a schematic structural diagram of a light emitting diode epitaxial wafer according to an embodiment of the present utility model; FIG. 2 is a schematic diagram of a buffer layer according to an embodiment of the present utility model; fig. 3 is a schematic structural diagram of an interposer according to an embodiment of the present utility model. Detailed Description The present utility model will be described in further detail with reference to the accompanying drawings, for the purpose of making the objects, technical solutions and advantages of the present utility model more apparent. It is only stated that the terms of orientation such as up, down, left, right, front, back, inner, outer, etc. used in this document or the imminent present utility model, are used only with reference to the drawings of the present utility model, and are not meant to be limiting in any way. As shown in fig. 1, an embodiment of the present utility model provides a light emitting diode epitaxial wafer, which includes a substrate 100, and a buffer layer 200, a U-GaN layer 300, an N-GaN layer 400, an insertion