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CN-224218816-U - Small-size paster diode packaging structure

CN224218816UCN 224218816 UCN224218816 UCN 224218816UCN-224218816-U

Abstract

The utility model discloses a small-sized patch diode packaging structure which is characterized by comprising a first pin and a second pin which are respectively and electrically connected with a chip element, wherein the second pin is provided with a straight part exposed out of the side part of a packaging body, the straight part is provided with a proximal end used for being jointed with an external device, and a pair of corners used for being matched with the proximal end and a die to be fixed are arranged on the side edges of the distal ends of the straight part, which are opposite to each other. Two opposite corners are arranged at two sides of the far end and are used as clamping fixing points of the die in the plastic packaging process, and the clamping fixing points are matched with the near end to form three-point control on the plane of the straight part, so that the sealing glue is ensured not to cross the preset boundary, and the straight part is smoothly exposed.

Inventors

  • LIN MAOCHANG

Assignees

  • 上海金克半导体设备有限公司

Dates

Publication Date
20260508
Application Date
20250324

Claims (7)

  1. 1. A compact chip diode package structure comprising a first pin and a second pin electrically connected to a chip element, respectively, the second pin having a straight portion exposed from a side of a package body, the straight portion having a proximal end for engagement with an external device, a pair of corners being provided on opposite sides of distal ends of the straight portion to each other for fixing in cooperation with the proximal end and a die.
  2. 2. A compact chip diode package as recited in claim 1, characterised in that said proximal end and said pair of corners lie in a plane defined by said straight portions.
  3. 3. A compact chip diode package as recited in claim 1, characterised in that said first pin is exposed from a side of the package body as a first pin for bonding to an external device, said first pin being provided with a glue between said first pin and said flat portion.
  4. 4. A compact chip diode package as recited in claim 3, characterised in that said first pin and said straight portion lie in the same plane as the bottom of said package.
  5. 5. A compact chip diode package as claimed in any one of claims 1 to 4, wherein said package is SOD.
  6. 6. A compact chip diode package as recited in any of claims 1 to 4, characterised in that said chip element has an operating current of less than 5A.
  7. 7. A compact chip diode package as recited in any of claims 1 to 4, characterised in that said chip is a diode.

Description

Small-size paster diode packaging structure Technical Field The utility model relates to the field of semiconductor packaging, in particular to a small-sized surface-mounted diode packaging structure. Background Chinese utility model publication No. CN219350224U discloses a circuit breaking protection diode packaging structure. Such a conventional package structure pin exposes only a portion for connection with an external element at both sides of the plastic package structure. In order to improve the heat dissipation performance of the chip element, the inventor tries to arrange exposed pins with large area at the bottom of the plastic package structure instead. Considering that under the past structure, the mould is fixed through the tip implementation of clip pin during plastic packaging, and this kind of fixed mode is difficult to control the position degree of pin distal end under the novel structure, leads to plastic packaging glue to spill over towards the part that exposes. Disclosure of utility model In order to overcome the above-mentioned drawbacks of the prior art, the present utility model is directed to a small-sized chip diode package structure, so as to achieve the purpose of improving the package precision and further improving the package flash problem. In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows: a compact chip diode package structure includes a first lead and a second lead electrically connected to a chip element, respectively, the second lead having a straight portion exposed from a side portion of the package body, the straight portion having a proximal end for engagement with an external device, a pair of corners being provided on sides of distal ends of the straight portion opposite to each other for fixing in cooperation with the proximal end and a die. Further, the proximal end and the pair of corners lie in a plane defined by the straight portions. Further, the first pins expose first pins which are also used for being jointed with an external device from one side of the packaging body, and sealing glue is arranged between the first pins and the straight part. Further, the first pin and the straight portion are located on the same plane of the bottom of the package body. Further, the package structure is SOD. Further, the operating current of the chip element is less than 5A. Further, the chip is a diode. The utility model has the beneficial effects that: According to the small-sized patch diode packaging structure, the opposite corners are arranged on two sides of the far end and serve as clamping fixing points of the die in the plastic packaging process, and the clamping fixing points are matched with the near end to form three-point control on the plane of the straight part, so that the sealing glue is ensured not to cross the preset boundary, and the straight part is smoothly exposed. Drawings In order to more clearly illustrate the embodiments of the present utility model or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. Fig. 1 is an underside view of a package of the present utility model. Fig. 2 is a bottom view of the present utility model. Detailed Description In the description of the present utility model, it should be noted that the directions or positional relationships indicated by the terms "upper", "lower", "left", "right", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, and the above description is for convenience of description of the present utility model to simplify the description, rather than to indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model. Exemplary embodiments of the present application will be described below with reference to the accompanying drawings. It should be understood, however, that the application may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. It should also be understood that the embodiments disclosed herein can be combined in various ways to provide yet additional embodiments. Throughout the drawings, like reference numbers indicate identical or functionally identical elements. Fig. 1 and 2 show a package structure with distal pin fixation, in order to enhance the heat dissipation capability of the chip element in the molding compound 10, the second pin 30 is designed to have a flat portion 31 extending from a proximal end 30a connected to an external component such as a PCB board toward a distal end 30b of the first pin 20, i.e., the proximal end 30a and the distal end 30b respectively constitute two end points of the flat portion 31. The flat portion 31 corresponds to a part of the outer