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CN-224230973-U - Leveling detection circuit for chuck and probe card and wafer burn-in test system

CN224230973UCN 224230973 UCN224230973 UCN 224230973UCN-224230973-U

Abstract

The utility model discloses a leveling detection circuit for a chuck and a probe card and a wafer burn-in test system, wherein leveling probes are arranged on the probe card, each leveling probe is connected with the chuck through a circuit conduction detection chip and a power supply, when the height of each jacking on the chuck changes, the leveling probes are contacted with the chuck, the leveling probes contacted with the chuck, the circuit conduction detection chip, the power supply and the chuck form a conduction loop, and when the height difference between the jacking first height corresponding to a first conduction first input end and the jacking second height corresponding to a last conduction first input end in the circuit conduction detection chip is smaller than a preset height difference, an upper computer determines that the chuck and the probe card are parallel to each other. The trigger circuit is used for conducting the corresponding first input end of the detection chip when the leveling probe is in contact with the chuck, so that the upper computer is triggered to determine whether the chuck and the probe card are parallel to each other, and the accuracy of control and judgment of leveling of the chuck and the probe card is improved.

Inventors

  • GU YINGCHUN
  • XU PENGSONG

Assignees

  • 苏州联讯仪器股份有限公司

Dates

Publication Date
20260512
Application Date
20250520

Claims (10)

  1. 1. The leveling detection circuit for the chuck and the probe card is characterized by comprising a plurality of leveling probes, a circuit conduction detection chip, a power supply and an upper computer; The circuit on-chip comprises a plurality of leveling probes, a circuit on-chip, a power supply, a chuck, a circuit on-chip and a circuit on-chip, wherein any one of the plurality of leveling probes is arranged on the probe card; And when the height difference between the first lifting height corresponding to the first conducting input end and the second lifting height corresponding to the last conducting first input end in the circuit conduction detection chip is smaller than a preset height difference, the upper computer determines that the chuck and the probe card are parallel to each other.
  2. 2. The leveling detection circuit for a chuck and a probe card according to claim 1, wherein the power supply is a wafer test low voltage source meter, and the wafer test low voltage source meter is used for supplying power to a circuit where a first input end conducted in the circuit conduction detection chip is located, or supplying power to a circuit formed by the probe card and a wafer when the wafer low voltage test is performed.
  3. 3. The leveling detection circuit for a chuck and probe card of claim 2, further comprising a control switch board; The first power supply end of the control switch board is connected with each second input end of the circuit conduction detection chip, the second power supply end is connected with the chuck, the first power supply end is connected with the first output end of the wafer test low-voltage source meter, the second power supply end is connected with the second output end of the wafer test low-voltage source meter, and the control switch board is used for closing a circuit among the circuit conduction detection chip, the wafer test low-voltage source meter and the chuck.
  4. 4. The leveling detection circuit for a chuck and probe card of claim 3, further comprising a high voltage isolation circuit; Each first input end of the high-voltage isolation circuit is connected with each leveling probe, each second input end of the high-voltage isolation circuit is connected with each first input end of the circuit conduction detection chip, and the high-voltage isolation circuit is used for being turned off when a wafer low-voltage test and a wafer high-voltage test are carried out, and is turned on when leveling detection of the chuck and the probe card is carried out; The third power end of the control switch board is connected with the first output end of the wafer test high-voltage source meter, the fourth power end of the control switch board is connected with the second output end of the wafer test high-voltage source meter, and the control switch board is further used for being closed in a first mode when the wafer low-voltage test is conducted so that a circuit formed by the probe card, the wafer and the wafer test low-voltage source meter is closed, being closed in a second mode when the wafer high-voltage test is conducted so that a circuit formed by the probe card, the wafer and the wafer test high-voltage source meter is closed, and being closed in a third mode when the leveling detection of the chuck and the probe card is conducted so that a circuit among the circuit conduction detection chip, the wafer test low-voltage source meter and the chuck is closed.
  5. 5. The leveling detection circuit for a chuck and a probe card of claim 4, wherein the high voltage isolation circuit comprises a plurality of high voltage isolation switches, a first end of each high voltage isolation switch is respectively a first input end of the high voltage isolation circuit, a second end of each high voltage isolation switch is respectively a second input end of the high voltage isolation circuit, and a control end of each high voltage isolation switch is a control end of the high voltage isolation circuit.
  6. 6. The leveling detection circuit for a chuck and probe card of claim 5, wherein the high voltage isolation switch is an NMOS.
  7. 7. The leveling detection circuit for a chuck and probe card of claim 4, wherein the high voltage isolation circuit comprises a plurality of contacts of a relay and a coil of the relay; the first ends of the contacts are respectively the first input ends of the high-voltage isolation circuit, and the second ends of the contacts are respectively the second input ends of the high-voltage isolation circuit; The coil of the relay is used for being electrified when leveling detection of the chuck and the probe card is carried out, so that the coil of the relay attracts each contact of the relay.
  8. 8. The leveling detection circuit for a chuck and probe card of claim 7, wherein the high voltage isolation circuit further comprises a high voltage isolation control chip; The output end of the high-voltage isolation control chip is connected with the coil of the relay and is used for controlling the coil of the relay to be electrified when leveling detection of the chuck and the probe card is carried out, so that the coil of the relay attracts all contacts of the relay.
  9. 9. The leveling detection circuit for chuck and probe card as set forth in any one of claims 1 to 8, further comprising a plurality of indicator lights, each of said indicator lights being in one-to-one correspondence with each of said leveling probes; The indicator lamp is connected between the corresponding leveling probe and the first input end of the corresponding circuit conduction detection chip and is used for being lightened when the first input end of the corresponding circuit conduction detection chip is conducted.
  10. 10. A wafer burn-in system comprising a leveling detection circuit for a chuck and a probe card as set forth in any one of claims 1-9.

Description

Leveling detection circuit for chuck and probe card and wafer burn-in test system Technical Field The utility model relates to the field of power electronic technology testing, in particular to a leveling detection circuit for chucks and probe cards and a wafer aging test system. Background In wafer testing, a wafer is usually carried by a chuck, and a plurality of probes are arranged on a probe card. If the probe card and the chuck are not kept parallel, the probes on the probe card cannot contact all the welding spots on the wafer, or the pressure of part of the probes is overlarge, abrasion of the probes is accelerated, the service life of the probe card is influenced, and the other part of the probes are in poor contact, so that the result of testing the wafer is inaccurate, and even the wafer is damaged. Therefore, the chuck and probe card need to be leveled prior to wafer testing. In the prior art, when leveling a chuck and a probe card is performed, typically, a leveling probe is respectively arranged on four sides of the probe card, each leveling probe is connected to an external power supply through an LED (light-emitting diode), the external power supply is connected to the chuck, the leveling probe is contacted with the chuck by adjusting the jacking height of the chuck, when one leveling probe is contacted with the chuck, the leveling probe contacted with the chuck, the LED, the external power supply and the chuck form a conducting loop, then the LED connected with the leveling probe contacted with the chuck is lighted, a worker can determine whether the chuck and the probe card are parallel to each other by observing whether the four LEDs are lighted or not, and the jacking height difference of the chuck is lighted respectively, so that leveling is performed on the chuck and the probe card, but the leveling efficiency, the precision and the accuracy of the chuck and the probe card cannot be ensured by naked eyes of workers. Disclosure of utility model The utility model aims to provide a leveling detection circuit for a chuck and a probe card and a wafer aging test system, which are characterized in that a trigger circuit is used for conducting a corresponding first input end of a detection chip when a leveling probe is contacted with the chuck so as to trigger an upper computer to determine whether the chuck and the probe card are parallel to each other, thereby improving the accuracy of controlling and judging the leveling of the chuck and the probe card. In order to solve the technical problems, the utility model provides a leveling detection circuit for chucks and probe cards, which comprises a plurality of leveling probes, a circuit conduction detection chip, a power supply and an upper computer; The circuit on-chip comprises a plurality of leveling probes, a circuit on-chip, a power supply, a chuck, a circuit on-chip and a circuit on-chip, wherein any one of the plurality of leveling probes is arranged on the probe card; and when the difference between the jacking first height corresponding to the first conducting first input end and the jacking second height corresponding to the last conducting first input end in the circuit conduction detection chip is smaller than a preset height, the upper computer determines that the chuck and the probe card are parallel to each other. Preferably, the power supply is a wafer test low-voltage source meter, and the wafer test low-voltage source meter is used for low-voltage power supply for a circuit where the first input end conducted in the circuit conduction detection chip is located, or for low-voltage power supply for a circuit formed by the probe card and the wafer when the wafer low-voltage test is performed. Preferably, the control switch board is further included; The first power supply end of the control switch board is connected with each second input end of the circuit conduction detection chip, the second power supply end is connected with the chuck, the first power supply end is connected with the first output end of the wafer test low-voltage source meter, the second power supply end is connected with the second output end of the wafer test low-voltage source meter, and the control switch board is used for closing a circuit among the circuit conduction detection chip, the wafer test low-voltage source meter and the chuck. Preferably, the high-voltage isolation circuit is further included; Each first input end of the high-voltage isolation circuit is connected with each leveling probe, each second input end of the high-voltage isolation circuit is connected with each first input end of the circuit conduction detection chip, and the high-voltage isolation circuit is used for being turned off when a wafer low-voltage test and a wafer high-voltage test are carried out, and is turned on when leveling detection of the chuck and the probe card is carried out; The third power end of the control switch board is connected with the first output end