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CN-224231832-U - Noise injection device and anti-interference test equipment

CN224231832UCN 224231832 UCN224231832 UCN 224231832UCN-224231832-U

Abstract

The utility model relates to a noise injection device and anti-interference test equipment, and relates to the technical field of semiconductor testing, wherein the noise injection device comprises a PCB (printed circuit board), a noise generator, a noise signal wire and a target signal wire, the noise generator, the noise signal wire and the target signal wire are all arranged in the PCB, the noise generator is connected with the noise signal wire and is used for outputting a noise signal to the noise signal wire, and the target signal wire is used for transmitting a signal to be tested, wherein the noise signal is coupled with the signal to be tested. The noise injection device injects noise signals by means of the noise generator inside the PCB, does not need to add special noise injection test boards by means of an external signal generator, is simple to realize, has high efficiency and is convenient for automatic test.

Inventors

  • GAO GUOMING

Assignees

  • 东莞记忆存储科技有限公司

Dates

Publication Date
20260512
Application Date
20250327

Claims (10)

  1. 1. The noise injection device is characterized by comprising a PCB, a noise generator, a noise signal line and a target signal line, wherein the noise generator, the noise signal line and the target signal line are all arranged in the PCB, the noise generator is connected with the noise signal line and is used for outputting a noise signal to the noise signal line, and the target signal line is used for transmitting a signal to be tested, and the noise signal is coupled with the signal to be tested.
  2. 2. The noise injection device of claim 1, wherein the PCB is a multi-layered structure, and the noise signal line and the target signal line are respectively disposed in two different layers of the PCB.
  3. 3. The noise injection device of claim 2, wherein the noise signal line and the target signal line are respectively disposed in two adjacent layers of the PCB board.
  4. 4. A noise injection device according to claim 3, wherein the noise signal line and the target signal line are parallel to each other in at least a partial region.
  5. 5. The noise injection device of claim 4, wherein the coupling length of the noise signal line and the target signal line is 1inch-5 inches.
  6. 6. The noise injection device of claim 1, further comprising a ground resistor, wherein the noise signal line is grounded through the ground resistor.
  7. 7. The noise injection apparatus of claim 1, further comprising a target device disposed on the PCB board, the target signal line being connected to the target device.
  8. 8. The noise injection device of claim 7, further comprising a host connected to the target signal line.
  9. 9. The noise injection apparatus of claim 1, wherein the noise generator is an MCU.
  10. 10. An anti-tamper test device, characterized in that it comprises a noise injection means according to any one of claims 1-9.

Description

Noise injection device and anti-interference test equipment Technical Field The present utility model relates to the field of semiconductor testing technologies, and in particular, to a noise injection device and an anti-interference testing apparatus. Background Many IOs in SSD controllers have anti-jitter or filtering functions for filtering ESD noise and unintended noise in the system to improve SSD robustness. For newly developed SSD controllers, the acceptance of the anti-shake function is achieved by means of an external signal generator and a dedicated noise injection test board. This test method is complex to implement and is disadvantageous for automated testing. Disclosure of utility model The utility model provides a noise injection device and anti-interference test equipment, which are used for solving at least one technical problem in the background technology. The utility model provides a noise injection device, which comprises a PCB, a noise generator, a noise signal line and a target signal line, wherein the noise generator, the noise signal line and the target signal line are all arranged in the PCB, the noise generator is connected with the noise signal line and is used for outputting a noise signal to the noise signal line, and the target signal line is used for transmitting a signal to be tested, wherein the noise signal is coupled with the signal to be tested. The further technical scheme is that the PCB is of a multi-layer structure, and the noise signal line and the target signal line are respectively arranged in two different layers of the PCB. The further technical scheme is that the noise signal line and the target signal line are respectively arranged in two adjacent layers of the PCB. The noise signal line and the target signal line are parallel to each other in at least partial areas. The further technical scheme is that the coupling length of the noise signal line and the target signal line is 1inch-5 inches. The noise injection device further comprises a grounding resistor, and the noise signal line is grounded through the grounding resistor. The noise injection device further comprises a target device, wherein the target device is arranged on the PCB, and the target signal line is connected with the target device. The noise injection device further comprises a host, and the host is connected with the target signal line. The further technical scheme is that the noise generator is an MCU. In a second aspect, the present utility model provides an anti-tamper test apparatus comprising a noise injection device according to the first aspect. Compared with the prior art, the technical scheme provided by the embodiment of the utility model has the following advantages: the noise injection device comprises a PCB, a noise generator, a noise signal line and a target signal line, wherein the noise generator, the noise signal line and the target signal line are all arranged in the PCB, the noise generator is connected with the noise signal line and is used for outputting a noise signal to the noise signal line, and the target signal line is used for transmitting a signal to be detected, wherein the noise signal is coupled with the signal to be detected. The noise injection device injects noise signals by means of the noise generator inside the PCB, does not need to add special noise injection test boards by means of an external signal generator, is simple to realize, has high efficiency and is convenient for automatic test. According to the technical scheme, noise injection is achieved through PCB interlayer coupling between MCU GPIO analog noise signals in the PCB and signals to be tested of the PCB, noise is adjusted through configuration of the driving strength and period of the GPIO, noise filtering and anti-shake function verification of the SSD controller are achieved, the scheme can be achieved through MCU control of a host factory, development and verification efficiency of the SSD controller is greatly improved, and robustness of the SSD controller is guaranteed. Drawings The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the utility model and together with the description, serve to explain the principles of the utility model. In order to more clearly illustrate the embodiments of the utility model or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to a person skilled in the art that other drawings can be obtained from these drawings without inventive effort. One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the drawings are not to be taken in a limiting sense, unless otherwise indicated. Fig. 1 is a schematic structural