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CN-224231851-U - Current sampling circuit based on depletion tube structure

CN224231851UCN 224231851 UCN224231851 UCN 224231851UCN-224231851-U

Abstract

The utility model provides a current sampling circuit based on a depletion tube structure, which comprises a depletion NMOS tube, a first enhancement NMOS tube, a second enhancement NMOS tube, a control module and a power capacitor, wherein the control module is respectively and electrically connected with the depletion NMOS tube, the first enhancement NMOS tube and the second enhancement NMOS tube, one end of the capacitor is grounded, the other end of the capacitor is connected with a VCC end of the control module, and the control module is used for completing the charging and the power supply of the capacitor by controlling a gate end and a source end of the depletion NMOS tube. The current sampling circuit based on the depletion tube structure disclosed by the utility model has the advantages that only the depletion type NMOS tube and the first enhancement type NMOS tube are high-voltage tubes, the circuit size is smaller, and the connection structure is simpler.

Inventors

  • BIAN BIN
  • ZHOU HAIJUN

Assignees

  • 南京志行聚能科技有限责任公司

Dates

Publication Date
20260512
Application Date
20250724

Claims (6)

  1. 1. A current sampling circuit based on a depletion tube structure is characterized by comprising a depletion type NMOS tube (300), a first enhancement type NMOS tube (301), a second enhancement type NMOS tube (303), a control module (305) and a power supply capacitor (304), wherein the control module (305) is respectively and electrically connected with the depletion type NMOS tube (300), the first enhancement type NMOS tube (301) and the second enhancement type NMOS tube (303), one end of the power supply capacitor (304) is grounded, the other end of the power supply capacitor is connected with a VCC end of the control module (305), and the control module (305) completes charging and power supply of the power supply capacitor (304) by controlling a gate end and a source end of the depletion type NMOS tube (300).
  2. 2. The current sampling circuit based on the depletion transistor structure according to claim 1, wherein a drain terminal of the depletion NMOS (300) is connected to the input voltage VIN, a gate terminal of the depletion NMOS (300) is connected to the control module (305), a source terminal of the depletion NMOS (300) is connected to the control module (305), and a source terminal of the depletion NMOS (300) is connected to a drain terminal of the second enhancement NMOS (303).
  3. 3. The current sampling circuit based on the depletion tube structure according to claim 2, wherein the gate terminal of the second enhancement type NMOS tube (303) is connected to the control module (305), the signal is DRV1, and the source terminal signal of the second enhancement type NMOS tube (303) is CS.
  4. 4. A current sampling circuit based on a depletion transistor structure according to claim 3, characterized in that the drain terminal of the first enhancement NMOS transistor (301) is connected to the input voltage VIN, the source terminal of the first enhancement NMOS transistor (301) is grounded, and the gate terminal of the first enhancement NMOS transistor (301) is connected to the control module (305), and the signal is DRV.
  5. 5. The current sampling circuit based on a depletion transistor structure of claim 4, wherein the gate and source terminals of the depletion NMOS transistor (300) are connected to a resistor (302).
  6. 6. The current sampling circuit based on a depletion transistor structure of claim 5, wherein said depletion NMOS (300) is replaced with a field effect transistor.

Description

Current sampling circuit based on depletion tube structure Technical Field The utility model belongs to the technical field of integrated circuits, and particularly relates to a current sampling circuit based on a depletion tube structure. Background In a switching power supply application, a conventional current sampling circuit is shown in fig. 1, and includes a start-up resistor 102, an enhanced NMOS transistor 103, an enhanced NMOS transistor 100, an enhanced NMOS transistor 101, a sampling resistor 104, a control module 106, and a power capacitor 105. The control module 106 controls the enhanced NMOS tube 103 to finish starting and supplying power, and the control module 106 outputs high and low levels through a signal DRV to realize the on and off of the enhanced NMOS tube 100 and the enhanced NMOS tube 101. Fig. 2 shows waveforms of a conventional current sampling circuit operating in a discontinuous state, assuming that the current flowing in the VIN terminal is Iin, the on-resistance of the enhanced NMOS 100 is R1, the on-resistance of the enhanced NMOS 101 is R2, and the resistance of the sampling resistor 104 is R3. Then the relationship of Iin to CS is: In the circuit, the enhanced NMOS tube 103, the enhanced NMOS tube 100 and the enhanced NMOS tube 101 are high-voltage tubes, and the areas and the sizes of the high-voltage tubes are larger. Therefore, a current sampling circuit with a more compact structure is needed. Disclosure of Invention The utility model aims to provide a novel current sampling circuit based on a depletion tube structure, which has the advantages that the circuit only comprises a depletion type NMOS tube and a first enhancement type NMOS tube high-voltage tube, the circuit size is smaller, and the connection structure is simpler. The utility model provides a current sampling circuit based on a depletion tube structure, which comprises a depletion NMOS tube, a first enhancement NMOS tube, a second enhancement NMOS tube, a control module and a power capacitor, wherein the control module is respectively and electrically connected with the depletion NMOS tube, the first enhancement NMOS tube and the second enhancement NMOS tube, one end of the power capacitor is grounded, the other end of the power capacitor is connected with a VCC end of the control module, and the control module completes charging and power supply of the power capacitor by controlling a gate end and a source end of the depletion NMOS tube. Preferably, the drain end of the depletion type NMOS tube is connected with the input voltage VIN, the gate end of the depletion type NMOS tube is connected with the control module, the source end of the depletion type NMOS tube is connected with the control module, and the source end of the depletion type NMOS tube is connected with the drain end of the second enhancement type NMOS tube. Preferably, the gate end of the second enhanced NMOS tube is connected with the control module, the signal is DRV1, and the source end signal of the second enhanced NMOS tube is CS. Preferably, the drain end of the first enhancement NMOS tube is connected with the input voltage VIN, the source end of the first enhancement NMOS tube is grounded, the gate end of the first enhancement NMOS tube is connected with the control module, and the signal is DRV. Preferably, the gate and source terminals of the depletion NMOS transistor are connected to resistor 302. Preferably, the depletion type NMOS tube is replaced by a field effect tube Compared with the prior art, the utility model has the following beneficial effects: The current sampling circuit based on the depletion tube structure disclosed by the utility model has the advantages that only the depletion type NMOS tube and the first enhancement type NMOS tube are high-voltage tubes, the circuit size is smaller, and the connection structure is simpler. Drawings FIG. 1 shows a conventional current sampling circuit in the background art; FIG. 2 shows an operational waveform of a conventional current sampling circuit in the background art; FIG. 3 shows a current sampling circuit based on a depletion tube structure in the present utility model; Fig. 4 shows an operation waveform of a current sampling circuit based on a depletion tube structure in the present utility model. Reference numerals: The device comprises a depletion type NMOS tube 300, a first enhancement type NMOS tube 301, a resistor 302, a second enhancement type NMOS tube 303, a control module 305 and a power capacitor 304. Detailed Description In order to make the objects, technical solutions and advantages of the present utility model more apparent, the technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings. As shown in fig. 3, the utility model discloses a current sampling circuit based on a depletion transistor structure, which comprises a depletion type NMOS transistor 300, a first enhancement t