CN-224232130-U - Low dropout linear voltage stabilizing circuit without negative feedback

CN224232130UCN 224232130 UCN224232130 UCN 224232130UCN-224232130-U

Abstract

The utility model provides a low dropout linear voltage stabilizing circuit without negative feedback. The low-dropout linear voltage stabilizing circuit comprises a first current mirror, a second current mirror, a resistor and an isolation transistor group, wherein the first current mirror comprises a first current arm and a second current arm, the first current arm inputs a constant current source, the second current mirror comprises a third current arm and a fourth current arm, the third current arm is coupled between an input voltage and the second current arm, the input end of the fourth current arm is coupled with the input voltage, the resistor is coupled with the output end of the fourth current arm in series, so that current I=Iref is M.N, iref is a constant current source current value, M is a current amplification factor of the first current mirror, N is a current amplification factor of the second current mirror, and the isolation transistor group is coupled with the resistor to provide the output voltage of the low-dropout linear voltage stabilizing circuit based on the voltage on the resistor. The low-dropout linear voltage stabilizing circuit provided by the utility model can achieve high-precision output voltage without a negative feedback circuit, reduces the chip cost, and can realize full-load stable output without compensation.

Inventors

LIAO JIANPING
YE JUN
LI ZHENGYANG

Assignees

厦门市必易微电子技术有限公司

Dates

Publication Date: 20260512
Application Date: 20250422

Claims (8)

1. A low dropout linear voltage regulator circuit without negative feedback, comprising: The first current mirror comprises a first transistor and a second transistor, wherein the control end of the first transistor is coupled with the control end of the second transistor, the first end of the first transistor is coupled with the constant current source, and the second end of the first transistor and the second end of the second transistor are coupled with the reference ground; The second current mirror comprises a third transistor and a fourth transistor, the control end of the third transistor is coupled with the control end of the fourth transistor, the first end of the third transistor and the first end of the fourth transistor are coupled with the input voltage, and the second end of the third transistor is coupled with the first end of the second transistor; A fifth transistor having a first terminal coupled to the second terminal of the fourth transistor; A resistor having a first end coupled to the second end of the fifth transistor and a second end coupled to the reference ground, and The control terminal of the sixth transistor is coupled to the control terminal of the fifth transistor, the first terminal of the sixth transistor is coupled to the input voltage, and the second terminal of the sixth transistor provides the output voltage.
2. The low dropout linear regulator circuit according to claim 1, further comprising an isolation transistor coupled between the second terminal of the third transistor and the first terminal of the second transistor.
3. The low dropout linear regulator circuit according to claim 1, further comprising two series connected regulators coupled between the second terminal of the fifth transistor and the first terminal of the resistor.
4. The low dropout linear regulator circuit according to claim 1, further comprising a second resistor coupled between the second terminal of the sixth transistor and ground.
5. The low dropout linear voltage regulator circuit according to claim 1, wherein the first transistor, the second transistor, the fifth transistor, and the sixth transistor comprise N-type metal oxide semiconductor field effect transistors, wherein the control terminal of the first transistor, the control terminal of the second transistor, the control terminal of the fifth transistor, and the control terminal of the sixth transistor are gates, wherein the first terminal of the first transistor, the first terminal of the second transistor, the first terminal of the fifth transistor, and the first terminal of the sixth transistor are drains, wherein the second terminal of the first transistor, the second terminal of the second transistor, the second terminal of the fifth transistor, and the second terminal of the sixth transistor are sources, wherein the third transistor and the fourth transistor comprise P-type metal oxide semiconductor field effect transistors, wherein the first terminal of the third transistor and the first terminal of the fourth transistor are sources, wherein the second terminal of the third transistor and the second terminal of the fourth transistor are drains, wherein the gate and the drain of the first transistor are shorted, wherein the gate and the drain of the second transistor are shorted, and the gate and the drain of the fifth transistor are shorted.
6. A low dropout linear voltage regulator circuit without negative feedback, comprising: A first current mirror including a first current arm and a second current arm, the first current arm being input to a constant current source; The second current mirror comprises a third current arm and a fourth current arm, the third current arm is coupled between the input voltage and the second current arm, and the input end of the fourth current arm is coupled with the input voltage; A resistor coupled in series with the output of the fourth current arm such that a current I=Iref M N flowing through the resistor, wherein Iref is a constant current source current value, M is a current amplification factor of the first current mirror, N is a current amplification factor of the second current mirror, and The isolation transistor group is coupled with the resistor and provides the output voltage of the low-dropout linear voltage stabilizing circuit based on the voltage on the resistor.
7. The low dropout linear voltage regulator circuit according to claim 6, wherein the set of isolation transistors includes: A fifth transistor having a first terminal coupled to the output terminal of the fourth current arm and a second terminal coupled to the first terminal of the resistor, and And the control end of the sixth transistor is coupled with the control end of the fifth transistor and the first end of the fifth transistor, the first end of the sixth transistor is coupled with the input voltage, and the second end of the sixth transistor is used as the output end of the low-dropout linear voltage stabilizing circuit.
8. The low dropout linear regulator circuit according to claim 6, further comprising two series connected regulators coupled in series with a resistor.

Description

Low dropout linear voltage stabilizing circuit without negative feedback Technical Field The utility model relates to the field of electronics, in particular to a low dropout linear voltage stabilizing circuit without negative feedback. Background The main components of a typical low dropout linear regulator (LDO) are a power fet and a differential amplifier. Fig. 1 shows a conventional LDO device, which includes a power transistor Q, a differential amplifier 11, voltage dividing resistors R1, R2 and an output capacitor Co, wherein the voltage at a first input terminal of the differential amplifier 11 is determined by the LDO output voltages Vout and R1, R2 resistors, vfb=vout×r2/(r1+r2), and the reference voltage Vref is input to a second input terminal of the differential amplifier 11. If the output voltage Vout of the LDO deviates from the reference voltage Vref, the output of the differential amplifier 11 will feed back the deviation, and adjust the conduction degree of the power transistor Q, so as to calibrate the output voltage Vout of the voltage regulator. Because of the negative feedback circuit, the differential amplifier 11 needs to be compensated for stability. The compensation circuit can be stable in the full load range, and high design requirements are also provided for the compensation circuit. In view of this, there is a need to provide a new architecture or control method in order to solve at least some of the above problems. Disclosure of utility model At least in view of one or more problems in the background art, the present utility model provides a low dropout linear regulator circuit without negative feedback. According to one aspect of the utility model, the low dropout linear voltage regulator circuit without negative feedback comprises a first current mirror, a second current mirror, a third current mirror and a fourth current mirror, wherein the first current mirror comprises a first transistor and a second transistor, the control end of the first transistor is coupled with the control end of the second transistor, the first end of the first transistor is coupled with a constant current source, the second end of the first transistor and the second end of the second transistor are grounded, the second current mirror comprises a third transistor and a fourth transistor, the control end of the third transistor is coupled with the control end of the fourth transistor, the first end of the third transistor and the first end of the fourth transistor are coupled with an input voltage, the second end of the third transistor is coupled with the first end of the second transistor, the first end of the fifth transistor is coupled with the second end of the fourth transistor, the first end of the resistor is coupled with the second end of the fifth transistor, the second end of the resistor is coupled with a reference ground, and the control end of the sixth transistor is coupled with the control end of the fifth transistor, the first end of the fourth transistor is coupled with the input voltage, and the sixth end of the sixth transistor is coupled with the second end of the sixth transistor. Optionally, the low dropout linear regulator circuit further includes an isolation transistor coupled between the second terminal of the third transistor and the first terminal of the second transistor. Optionally, the low dropout linear regulator circuit further comprises two series connected regulators coupled between the second terminal of the fifth transistor and the first terminal of the resistor. Optionally, the low dropout linear regulator circuit further includes a second resistor coupled between the second terminal of the sixth transistor and the reference ground. Optionally, the first transistor, the second transistor, the fifth transistor and the sixth transistor include N-type MOSFETs (metal oxide semiconductor field effect transistors), wherein the control terminal of the first transistor, the control terminal of the second transistor, the control terminal of the fifth transistor and the control terminal of the sixth transistor are gates, the first terminal of the first transistor, the first terminal of the second transistor, the first terminal of the fifth transistor and the first terminal of the sixth transistor are drains, the second terminal of the first transistor, the second terminal of the second transistor, the second terminal of the fifth transistor and the second terminal of the sixth transistor are sources, the third transistor and the fourth transistor include P-type MOSFETs, the first terminal of the third transistor and the first terminal of the fourth transistor are sources, the second terminal of the third transistor and the second terminal of the fourth transistor are drains, the gates and the drains of the first transistor are shorted, the gates and the drains of the third transistor are shorted, and the gates and the drains of the fifth transistor are shorted. According