CN-224232520-U - Diaphragm lamination structure and high-capacity-ratio high-voltage multilayer ceramic dielectric capacitor

CN224232520UCN 224232520 UCN224232520 UCN 224232520UCN-224232520-U

Abstract

The utility model discloses a membrane lamination structure and a high-capacity-ratio high-voltage multilayer ceramic dielectric capacitor, relating to the field of capacitor structures, the inner electrode pattern in the single first electrode-coated membrane differs from the inner electrode pattern of the single second electrode-coated membrane. According to the embodiment of the utility model, the membrane to be electrode is arranged into two different patterns without dislocation lamination, so that the purposes of reducing the margin between the inner electrodes in the same inner electrode layer, increasing the opposite areas of the inner electrodes between different inner electrode layers and improving the capacitance ratio of the capacitor are achieved.

Inventors

XIE MING
YANG XIULING
HE LIANG
Wei Dongjuan
CHENG XI
YANG HANWEN
ZHOU DANDAN

Assignees

成都宏科电子科技有限公司

Dates

Publication Date: 20260512
Application Date: 20250529

Claims (10)

1. The membrane laminated structure is characterized by comprising a plurality of first membrane electrodes and second membrane electrodes which are alternately overlapped, wherein the inner electrode patterns in the first membrane electrodes are different from the inner electrode patterns in the second membrane electrodes.
2. The membrane laminated structure according to claim 1, wherein the inner electrode pattern of the first membrane to be electrode includes a plurality of first patterns (1) and second patterns (2) alternately arranged in sequence from left to right, and the inner electrode pattern of the second membrane to be electrode includes a plurality of second patterns (2) and first patterns (1) alternately arranged in sequence from left to right; When the first electrode membrane and the second electrode membrane are alternately stacked, the projection of the second pattern (2) in the inner electrode pattern of the first electrode membrane in the vertical direction falls into the range of the first pattern (1) in the inner electrode pattern of the second electrode membrane.
3. A membrane stack according to claim 2, characterized in that the first pattern (1) is rectangular and the second pattern (2) is rectangular.
4. A membrane laminate structure according to claim 3, characterized in that the width of the first pattern (1) is equal to the width of the second pattern (2).
5. A membrane laminate structure according to claim 4, characterized in that the length of the first pattern (1) is greater than the length of the second pattern (2).
6. The membrane laminated structure according to claim 5, wherein the number of first patterns (1) in the inner electrode patterns of the first membrane to be electrode is equal to the number of second patterns (2) in the inner electrode patterns of the second membrane to be electrode; The number of second patterns (2) in the inner electrode patterns of the first electrode-to-be-detected film is equal to the number of first patterns (1) in the inner electrode patterns of the second electrode-to-be-detected film.
7. A membrane stack according to claim 5, characterized in that the projection of the second pattern (2) in the horizontal direction falls within the first pattern (1).
8. The membrane laminated structure according to claim 5, wherein the inner electrode patterns of the first membrane to be electrode are axisymmetric patterns in both horizontal and vertical directions, and the inner electrode patterns of the second membrane to be electrode are axisymmetric patterns in both horizontal and vertical directions.
9. The high-volume-ratio high-voltage multilayer ceramic capacitor is characterized by comprising an electrode structure formed by cutting the membrane laminated structure according to any one of claims 1-8, wherein the electrode structure comprises a plurality of first inner electrode layers (3) and second inner electrode layers (4) which are alternately overlapped, the margin reserved between the inner electrodes of the first inner electrode layers (3) and the second inner electrode layers (4) is d 1 , the margin reserved between the end electrode and the inner electrode of the electrode structure is d 2 , and d 1 < d 2 .
10. A high-volume ratio high-voltage multilayer ceramic dielectric capacitor according to claim 9, characterized in that the distance between the adjacent first inner electrode layer (3) and the second inner electrode layer (4) is d 3 , said d 3 < d 1 .

Description

Diaphragm lamination structure and high-capacity-ratio high-voltage multilayer ceramic dielectric capacitor Technical Field The utility model relates to the field of capacitor structures, in particular to a membrane laminated structure and a high-capacity-ratio high-voltage multilayer ceramic dielectric capacitor. Background The high-voltage multilayer chip ceramic capacitor (MLCC) in the current market generally adopts a design structure with internal capacitors connected in series, and an electrode membrane is an electrode pattern and is produced through staggered membrane lamination. The design structure mainly depends on screen printing equipment to process the inner electrode membrane in the production process, and the screen printing technology can print the inner electrode slurry into electrode patterns with certain shapes and sizes. The process has the advantages of high alignment precision, simple operation and capability of effectively ensuring the printing quality of the inner electrode, thereby improving the stability and reliability of the product. However, this design also has some drawbacks in that the electrode facing area is relatively small because the margin between the terminal electrode and the internal electrode (as shown in B of fig. 1) is 1/2 of the margin between the internal electrodes (as shown in a of fig. 1), i.e., the margin between the internal electrodes is large. According to the calculation formula c=k×m×n/T of capacitance capacity, where M represents the facing area, the decrease of the facing area directly affects the capacitance capacity. Therefore, the design is difficult to realize a model with high volume ratio, and the use of the capacitor in some application scenes with high requirements on the volume is limited. In view of this, the present application has been made. Disclosure of utility model The utility model aims to provide a membrane lamination structure and a high-capacity-ratio high-voltage multilayer ceramic dielectric capacitor, and the membrane to be electrode is arranged into two different patterns without dislocation lamination, so that the problem that the opposite area of an electrode is relatively smaller due to overlarge margin between inner electrodes in the prior art is solved. The embodiment of the utility model is realized by the following technical scheme that a membrane lamination structure is provided firstly, and comprises a plurality of first electrode membrane sheets and second electrode membrane sheets which are alternately overlapped and arranged, wherein the inner electrode patterns in a single first electrode membrane sheet are different from the inner electrode patterns of a single second electrode membrane sheet. Optionally, the inner electrode pattern of the first electrode-coated membrane comprises a plurality of first patterns and second patterns which are alternately arranged from left to right, and the inner electrode pattern of the second electrode-coated membrane comprises a plurality of second patterns and first patterns which are alternately arranged from left to right; When the first electrode-coated film and the second electrode-coated film are alternately stacked, the projection of the second pattern in the inner electrode pattern of the first electrode-coated film in the vertical direction falls within the range of the first pattern in the inner electrode pattern of the second electrode-coated film. Optionally, the first pattern is rectangular, and the second pattern is rectangular. Optionally, the width of the first pattern is equal to the width of the second pattern. Optionally, the length of the first pattern is greater than the length of the second pattern. Optionally, the number of first patterns in the inner electrode patterns of the first electrode-coated membrane is equal to the number of second patterns in the inner electrode patterns of the second electrode-coated membrane; The number of second patterns in the inner electrode patterns of the first electrode-coated film is equal to the number of first patterns in the inner electrode patterns of the second electrode-coated film. Optionally, the projection of the second pattern in the horizontal direction falls within the range of the first pattern. Optionally, the inner electrode patterns of the first electrode-coated membrane are axisymmetric patterns in the horizontal direction and the vertical direction, and the inner electrode patterns of the second electrode-coated membrane are axisymmetric patterns in the horizontal direction and the vertical direction. The embodiment of the utility model also provides a high-volume-ratio high-voltage multilayer ceramic dielectric capacitor, which comprises an electrode structure formed by cutting the membrane laminated structure, wherein the electrode structure comprises a plurality of first inner electrode layers and second inner electrode layers which are alternately overlapped, the margin reserved between the inner elec