CN-224233897-U - Optimized structure of high-speed differential via hole, electronic equipment and system

Abstract

The utility model discloses an optimized structure of a high-speed differential via hole, wherein the high-speed differential via hole is arranged in each wiring layer, each layer is provided with a corresponding anti-bonding pad, a corresponding wiring is laid in each high-speed differential via hole, a part of the wiring in a suspended area outside the corresponding anti-bonding pad of each adjacent wiring layer is marked as a suspended wire, a part of the wiring in the high-speed differential via hole is marked as a via wire, the suspended wire is thickened, the suspended wire is controlled to be thicker than the via wire, the suspended wire in the wiring is thicker than the via wire, and the anti-bonding pad in each non-adjacent wiring layer is smaller than the preset anti-bonding pad. The utility model effectively adjusts the impedance of each part by using the thickened suspension wire, reducing the anti-bonding pad of the non-adjacent wiring layer and increasing the anti-bonding pad of the adjacent wiring layer in a combined way, meets the impedance requirement of high-speed signal transmission, does not need to change a process, and has high universality, simplicity and high efficiency in an optimized mode.

Inventors

• NIE SHANKUN
• ZHANG TAO
• LIN YE
• ZHOU HAIBIN

Assignees

• 江苏华创微系统有限公司

Dates

Publication Date

20260512

Application Date

20250516

Claims (8)

1. 1. An optimized structure of a high-speed differential via hole is applied to a multilayer PCB, and is characterized in that the multilayer PCB comprises a plurality of adjacent wiring layers and a plurality of non-adjacent wiring layers which are parallel, the high-speed differential via hole is arranged in each wiring layer, each layer is provided with a corresponding anti-bonding pad, and corresponding wiring is paved in the high-speed differential via hole; The part of the wiring in the suspended area outside the corresponding anti-bonding pad of each adjacent wiring layer is marked as a suspended wire, the part of the wiring in the high-speed differential via hole is marked as a via hole wire, the suspended wire is thicker than the via hole wire, and the size of the anti-bonding pad in each non-adjacent wiring layer is smaller than the preset size of the anti-bonding pad.
2. 2. An optimized high-speed differential via structure according to claim 1, wherein the anti-pad size in each adjacent trace layer is greater than the pre-set anti-pad size.
3. 3. An optimized high-speed differential via structure according to claim 2, wherein the anti-pads in each adjacent trace layer are the same size.
4. 4. An optimized high-speed differential via structure according to claim 1, wherein the anti-pads in each non-adjacent trace layer are the same size.
5. 5. The optimized high-speed differential via structure of claim 1, wherein the plurality of adjacent trace layers comprises at least two adjacent first adjacent trace layers and two adjacent second adjacent traces, and wherein the plurality of non-adjacent trace layers are between the two adjacent first adjacent trace layers and the two adjacent second adjacent traces.
6. 6. An optimized high-speed differential via structure according to claim 1, wherein the number of layers of the plurality of non-adjacent traces is greater than the number of layers of the plurality of adjacent traces.
7. 7. An electronic device, wherein a multilayer PCB is built in the electronic device, and the multilayer PCB adopts the optimized high-speed differential via structure according to any one of claims 1 to 6.
8. 8. A system having a controller built-in to the system, the controller being connected to an electronic device as claimed in claim 7.

Description

Optimized structure of high-speed differential via hole, electronic equipment and system Technical Field The utility model relates to the technical field of high-speed digital PCB design, in particular to an optimized structure, electronic equipment and a system of a high-speed differential via hole. Background PCBs, collectively referred to as Printed Circuit Board, printed circuit boards, are one of the important components of the electronics industry, and are used to make electrical connections between circuits by printing or etching conductive patterns, such as copper foil, on an insulating substrate for supporting and connecting various electronic components. The high-speed digital PCB is a printed circuit board specially designed for processing high-speed signal transmission, and is widely applied to high-end electronic products such as computers, communication equipment, medical instruments and the like. In order to ensure reliable transmission of high speed signals above 25Gbps, such as 25Gbps, 32 Gbps, 56Gbps, and 112Gbps, a small impedance fluctuation of the physical transmission channel of the PCB is required. The high-speed differential via hole is used as the maximum impedance discontinuous point on the PCB, and the structure of the via hole is further optimized, so that the high-speed differential via hole has great benefits for the transmission of high-speed signals above 25 Gbps. However, the conventional differential via has no well-defined high-speed differential via, and the differential via used for high-speed signals with the speed of 25Gbps and above is not treated differently and is not further optimized if the differential via with the speed of 10Gbps is still used due to the inertia of the design, which obviously affects the signal performance with the speed of 25Gbps and above. At present, when a high-speed differential via hole is optimized, for example, when a certain specific model of multi-layer PCB device with the high-speed differential via hole is optimized, firstly, the original process can be changed into a higher-level process by changing the PCB process to meet transmission requirements, but the cost tends to be greatly increased, the overall layout is possibly influenced, even each lamination layer and actual wiring are required to be redesigned, the workload is possibly huge, secondly, strict new anti-pad size calculation is performed based on parameters such as the PCB node constant corresponding to the device, the via hole size, the preset anti-pad size and the like as an existing model, and the optimal size required by an anti-pad is obtained, but the calculation process is very complicated and lacks generality, and the actual device needs to be redesigned every time different actual devices are met. The preset anti-pad size refers to a default separation distance preset for a particular type of via or component pin at the time of design of the multi-layer PCB. That is, these measures currently taken involve at least the following two problems: 1) High cost and potentially significant effort; 2) The process is cumbersome and lacks versatility. Disclosure of utility model Aiming at the two problems, the utility model aims to provide an optimized structure, electronic equipment and a system of a high-speed differential via hole, which are characterized in that the suspended wire is thickened, the anti-bonding pad of a non-adjacent wiring layer is reduced, the anti-bonding pad of the adjacent wiring layer is enlarged, the impedance of each part is effectively regulated, so that the impedance requirement in high-speed signal transmission is met, and meanwhile, the process is not required to be replaced, and the optimization mode is high in universality, simple and efficient. The method is realized by the following technical scheme: first, an optimized structure of high-speed differential via is proposed The optimized structure of the high-speed differential via hole is applied to a multilayer PCB, the multilayer PCB comprises a plurality of parallel adjacent wiring layers and a plurality of non-adjacent wiring layers, the high-speed differential via hole is arranged in each wiring layer, each layer is provided with a corresponding anti-bonding pad, a corresponding wiring is paved in the high-speed differential via hole, a part of the wiring in a suspension area outside the corresponding anti-bonding pad of each adjacent wiring layer is marked as a suspension wire, a part of the wiring in the high-speed differential via hole is marked as a via wire, the suspension wire is thicker than the via wire, and the anti-bonding pad in each non-adjacent wiring layer is smaller than the preset anti-bonding pad. Preferably, the size of the anti-pad in each adjacent routing layer is greater than the size of the pre-set anti-pad. Preferably, the anti-pads in each adjacent routing layer are the same size. Preferably, the anti-pads in each non-adjacent routing layer are the same size. P