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CN-224234194-U - Semiconductor device with a semiconductor layer having a plurality of semiconductor layers

CN224234194UCN 224234194 UCN224234194 UCN 224234194UCN-224234194-U

Abstract

The application relates to a semiconductor device, which comprises a first metal layer, an insulating layer, a chip and a plurality of pins, wherein the insulating layer is formed by adopting a ceramic material, the pins comprise a first pin and a second pin, the first metal layer is adhered to the first surface of the insulating layer, the first metal layer comprises a first base island and a second base island which are mutually isolated, the chip is arranged on the second base island, the chip and the first base island are electrically connected through a bonding wire, the first pin is welded on the first base island, and the second pin is welded on the second base island. The semiconductor device can solve the problems that the prior semiconductor device needs to be additionally provided with an insulating heat conducting sheet when being assembled with a radiator, so that on one hand, the assembly complexity is increased, and on the other hand, layering easily occurs, and the resistance performance of the semiconductor device is reduced along with the increase of the service life.

Inventors

  • LI SONGYANG
  • LEI MING
  • ZHU DONGYING

Assignees

  • 珠海格力电子元器件有限公司

Dates

Publication Date
20260512
Application Date
20250526

Claims (10)

  1. 1. The utility model provides a semiconductor device, its characterized in that, semiconductor device includes first metal level (1), insulating layer (3), chip (4) and a plurality of pin, insulating layer (3) adopt ceramic material to form, the pin includes first pin (51) and second pin (52), first metal level (1) paste and locate the first surface of insulating layer (3), first metal level (1) include first base island (11) and second base island (12) that keep apart each other, chip (4) install in second base island (12), chip (4) with be connected through bonding wire (6) electricity between first base island (11), just first pin (51) weld in first base island (11), second pin (52) weld in second base island (12).
  2. 2. The semiconductor device according to claim 1, further comprising a second metal layer (2), wherein the second metal layer (2) is attached to a second surface of the insulating layer (3), the second surface is opposite to the first surface, and a side surface of the second metal layer (2) facing away from the insulating layer (3) is in thermal connection with a heat sink.
  3. 3. The semiconductor device according to claim 2, characterized in that the first metal layer (1) and the second metal layer (2) are each formed of metallic copper.
  4. 4. A semiconductor device according to claim 2, characterized in that the surface roughness of the side of the second metal layer (2) facing away from the insulating layer (3) is less than or equal to 2 μm.
  5. 5. The semiconductor device according to claim 1, wherein an outer edge of at least one of the first base island (11) and the second base island (12) is provided with a chamfer.
  6. 6. The semiconductor device according to claim 1, wherein a side surface of the first metal layer (1) facing the insulating layer (3) has a roughened structure.
  7. 7. The semiconductor device according to claim 1, wherein at least one of the first pin (51) and the second pin (52) includes a solder portion (5 a) and an extension portion (5 b), one end of the solder portion (5 a) is connected to the extension portion (5 b), a side surface of the solder portion (5 a) facing the insulating layer (3) is provided with a plurality of heat dissipation grooves (5 d) provided in a recessed manner, and the plurality of heat dissipation grooves (5 d) are arranged along a distribution direction of opposite ends in the solder portion (5 a).
  8. 8. The semiconductor device according to claim 7, wherein at least one of the first pin (51) and the second pin (52) further includes a raised portion (5 c), the protruding portion (5 b) is located on a side of the solder portion (5 a) facing away from the insulating layer (3) in a thickness direction of the insulating layer, and one end of the solder portion (5 a) is connected with the protruding portion (5 b) through the raised portion (5 c).
  9. 9. The semiconductor device according to claim 7, wherein at least one of opposite side edges of the solder portion (5 a) is located outside a corresponding side edge of the protruding portion (5 b) in a first direction, the first direction being perpendicular to both a thickness direction of the insulating layer (3) and a distribution direction of opposite ends in the solder portion (5 a).
  10. 10. The semiconductor device according to claim 1, wherein an outer edge of the insulating layer (3) is located outside an outer edge of the first metal layer (1) in a direction perpendicular to a thickness direction of the insulating layer (3).

Description

Semiconductor device with a semiconductor layer having a plurality of semiconductor layers Technical Field The present application relates to the field of semiconductors, and more particularly, to a semiconductor device. Background TO package structures are common semiconductor devices that typically include a leadframe and a chip mounted on the leadframe, and a heat spreader is typically disposed on the backside of the leadframe in order TO increase the heat dissipation efficiency of the chip. However, in the current semiconductor device, when the heat sink is mounted, an insulating heat conducting sheet needs to be arranged between the lead frame and the heat sink, so that on one hand, the assembly complexity is increased, and on the other hand, due to different materials on two opposite sides of the frame, layering easily occurs between the frame and the insulating heat conducting sheet, and the pressure resistance is reduced along with the increase of the service time. Disclosure of utility model The application provides a semiconductor device, which aims to solve the problems that when a radiator is assembled in the traditional semiconductor device, an insulating heat conducting sheet is required to be additionally arranged, so that on one hand, the assembly complexity is increased, and on the other hand, layering easily occurs, and the resistance performance of the semiconductor device is reduced along with the increase of the service time. The application provides a semiconductor device, which comprises a first metal layer, an insulating layer, a chip and a plurality of pins, wherein the insulating layer is formed by adopting a ceramic material, the pins comprise a first pin and a second pin, the first metal layer is adhered to the first surface of the insulating layer, the first metal layer comprises a first base island and a second base island which are mutually isolated, the chip is mounted on the second base island, the chip and the first base island are electrically connected through a bonding wire, the first pin is welded on the first base island, and the second pin is welded on the second base island. The embodiment of the application provides a semiconductor device, wherein an insulating layer is formed by adopting a ceramic material, so that the thermal expansion coefficients between the insulating layers respectively positioned at two opposite sides of a first metal layer and a chip are equivalent, meanwhile, in the embodiment of the application, the insulating layer can be utilized to realize the purpose of internal insulation of the device, so that the chip arranged at one side of the first metal layer, which is far away from the insulating layer, can form a good electrical insulation relationship with the outside, and the side of the insulating layer, which is far away from the first metal layer, can be directly in heat conduction connection with a radiator, thus an insulating heat conducting sheet and a heat conducting silicone coating are not required to be added in the installation process, the installation process is simplified, and the assembly time can be reduced by 35%. Moreover, under the condition of adopting the technical scheme of the application, the heat dissipation path is shortened, and the insulating layer made of ceramic material can provide relatively higher reliability and relatively lower thermal resistance for the chip, wherein the voltage resistance of the insulating layer can reach 2500V AC r.m.s. In addition, under the condition of adopting the technical scheme disclosed by the embodiment of the application, the chip is arranged on the second base island of the first metal layer, and the chip is electrically connected with the first base island through the bonding wire, so that the first pin and the second pin can be directly and sequentially welded on the first base island and the second base island, the installation complexity of a plurality of pins is reduced, and under the condition of adopting the technical scheme, the length of a current loop of the chip can be shortened, the stray inductance is reduced, and the reliability of a device is improved. Drawings The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the utility model and together with the description, serve to explain the principles of the utility model. In order to more clearly illustrate the embodiments of the utility model or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to a person skilled in the art that other drawings can be obtained from these drawings without inventive effort. One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the dr