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DE-102018122505-B4 - Backside deep trench insulating (BDTI) structure for image sensor with pinned photodiode

DE102018122505B4DE 102018122505 B4DE102018122505 B4DE 102018122505B4DE-102018122505-B4

Abstract

CMOS image sensor, including: a substrate (102) having a front (122) and a back (124) opposite the front (122); a plurality of pixel regions (103a, 103b) arranged in the substrate (102), each comprising a photodiode (104) configured to convert radiation entering the substrate (102) from the rear (124) into an electrical signal; and a BDTI structure (111) arranged in a deep trench (802) between adjacent pixel regions (103a, 103b) extending from the back (124) of the substrate (102) to a position in the substrate (102); wherein the BDTI structure (111) comprises a doped layer (114) having a first doping type and a dielectric filling layer (112), wherein the doped layer (114) lines a side wall surface of the deep trench (802) and the dielectric filling layer (112) fills the remaining space of the deep trench (802), and wherein the doped layer (114) and the dielectric filling layer (112) of the BDTI structure (111) extend upwards from the deep trench (802) and are arranged laterally along the rear side (124) of the substrate (102).

Inventors

  • Yen-Ting Chiang
  • Dun-Nian Yaung
  • Hsiao-Hui Tseng
  • Jen-Cheng Liu
  • Yu-Jen Wang
  • Chun-Yuan Chen

Assignees

  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Dates

Publication Date
20260513
Application Date
20180914
Priority Date
20171027

Claims (20)

  1. CMOS image sensor, comprising: a substrate (102) having a front (122) and a back (124) opposite the front (122); a plurality of pixel regions (103a, 103b) arranged in are arranged on the substrate (102) and each comprise a photodiode (104) configured to convert radiation entering the substrate (102) from the rear (124) into an electrical signal; and a BDTI structure (111) arranged in a deep trench (802) between adjacent pixel regions (103a, 103b) extending from the rear (124) of the substrate (102) to a position in the substrate (102); wherein the BDTI structure (111) comprises a doped layer (114) having a first doping type and a dielectric filling layer (112), wherein the doped layer (114) lines a side wall surface of the deep trench (802) and the dielectric filling layer (112) fills the remaining space of the deep trench (802), and wherein the doped layer (114) and the dielectric filling layer (112) of the BDTI structure (111) extend upwards from the deep trench (802) and are arranged laterally along the rear side (124) of the substrate (102).
  2. CMOS image sensor Claim 1 , further comprising: a doped insulating layer (110) of the first doping type and comprising a lateral section (110a) and a perpendicular section (110b) in direct contact with each other, wherein the lateral section (110a) extends along the front side (122) of the substrate (102) and the perpendicular section (110b) extends between the adjacent pixel regions (103a, 103b) from the front side (122) of the substrate (102) to a position in the substrate (102).
  3. CMOS image sensor Claim 2 , wherein the photodiode (104) comprises a first region (104a) with the first doping type and a second region (104b) with a second doping type that is different from the first doping type; and wherein the opposite sides of the first region (104a) touch the second region (104b) and the doped insulating layer (110).
  4. CMOS image sensor Claim 2 or 3 , wherein the doped insulating layer (110) and the BDTI structure (111) meet in the substrate (102).
  5. CMOS image sensor according to one of the previous Claims 2 until 4 , wherein a lower section of the BDTI structure (111) is arranged in a recessed upper surface of the vertical section (110b) of the doped insulating layer (110).
  6. CMOS image sensor according to one of the preceding claims, wherein the BDTI structure (111) further comprises a high K-value dielectric lining (113) arranged between the doped layer (114) and the dielectric filler layer (112).
  7. CMOS image sensor according to one of the preceding claims, wherein the doped layer (114) is a conformal layer and/or wherein the doped layer (114) is formed by an implantation process, a plasma doping process, an epitaxial growth process, or an atomic layer deposition process.
  8. A CMOS image sensor according to one of the preceding claims, further comprising: a floating diffusion tray (204) arranged between the adjacent pixel regions (103a, 103b) from the front (122) of the substrate (102) to a position in the substrate (102); and a transfer gate (202) arranged on the front (122) of the substrate (102) in a position laterally between the photodiode (104) and the floating diffusion tray (204).
  9. A CMOS image sensor according to any of the preceding claims, further comprising: a STI structure (302, 504) arranged between the adjacent pixel regions (103a, 103b) from the front (122) of the substrate (102) to a position in the substrate (102); wherein the STI structure (302, 504) and the BDTI structure (111) are oriented perpendicularly.
  10. CMOS image sensor Claim 9 , further comprising: a doped insulating layer (110) of the first doping type extending from the front (122) of the substrate (102) to a position in the substrate (102).
  11. CMOS image sensor Claim 10 , wherein the doped insulating layer (110) separates the STI structure (302, 504) from the BDTI structure (111).
  12. CMOS image sensor according to one of the previous Claims 9 until 11 , wherein the doped layer (114) of the BDTI structure (111) lands on a planar upper surface of the STI structure (302, 504), while the dielectric filler layer (112) of the BDTI structure (111) extends further downwards to a concave recess of the STI structure (302, 504).
  13. CMOS image sensor according to one of the preceding claims, further comprising: a BEOL metallization stack arranged on the front side (122) of the substrate (102) and comprising a plurality of metallic interconnection layers connected with one or are arranged in several dielectric intermediate layer layers.
  14. CMOS image sensor comprising: a substrate (102) having a front (122) and a back (124) opposite the front (122); a photodiode (104) arranged in the substrate (102); a BDTI structure (111) extending from the back (124) of the substrate (102) to positions in the substrate (102) on opposite sides of the photodiode (104); and a doped insulating layer (110) with a first doping type and comprising a lateral section (110a) and a perpendicular section (110b) in direct contact with each other, the lateral section (110a) extending over the photodiodes of the pixel regions (103a, 103b) along the front (122) of the substrate (102); wherein the BDTI structure (111) comprises a doped layer (114) of the first doping type and a dielectric filling layer (112), wherein the doped layer (114) lines a side wall surface of a deep trench (802) and the dielectric filling layer (112) fills a remaining space of the deep trench (802).
  15. CMOS image sensor Claim 14 , wherein the BDTI structure (111) is laterally adjacent to the side walls of the photodiode (104).
  16. CMOS image sensor Claim 14 or 15 , wherein the vertical section (110b) of the doped insulating layer (110) in the substrate (102) meets the BDTI structure (111).
  17. CMOS image sensor Claim 16 , further comprising: an STI structure (302, 504) extending from the front face (122) of the substrate (102) to a position in the doped insulating layer (110); wherein the STI structure (302, 504) and the BDTI structure (111) are oriented perpendicularly.
  18. CMOS image sensor according to one of the previous Claims 14 until 17 , wherein the BDTI structure (111) further comprises: a high K-value dielectric lining (113) arranged between the doped layer (114) and the dielectric filler layer (112).
  19. A method for forming an image sensor, comprising the following steps: Forming doped layers corresponding to the photodiodes of a plurality of pixel regions (103a, 103b) from a front face (122) of a substrate (102); Forming a doped insulating layer (110) from the front face (122) of the substrate (102) by implanting a dopant into the substrate (102) via a plurality of implantation processes, wherein the doped insulating layer (110) comprises a perpendicular section (110b) between adjacent pixel regions (103a, 103b); Rotating the substrate (102) and etching from a rear side (124) of the substrate (102) to form a deep trench (802) between adjacent pixel regions (103a, 103b) extending into the substrate (102), with the rear side (124) of the substrate (102) facing the front side (122) of the substrate (102); and filling the deep trench (802) with a doped layer (114) and a dielectric filler layer (112) of a dielectric layer to form a BDTI structure (111) positioned between the adjacent pixel regions (103a, 103b) and separating the photodiodes of the adjacent pixel regions (103a, 103b).
  20. Procedure according to Claim 19 , further comprising prior to turning over the substrate (102): forming a BEOL metallization stack on the front side (122) of the substrate (102), wherein the BEOL metallization stack comprises a plurality of metallic interconnection layers arranged in one or more dielectric interlayer layers.

Description

BACKGROUND Digital cameras and optical imaging devices use image sensors. Image sensors convert optical images into digital data that can be represented as digital images. An image sensor comprises a pixel matrix (or grid) for detecting the light intensity and recording intensity (brightness) of the detected light. The pixel matrix responds to the light by accumulating a charge. The accumulated charge is then used (for example, by other circuitry) to provide a color and brightness signal for use in a suitable application, such as a digital camera. One type of image sensor is a back-illuminated (BSI) image sensor device. BSI image sensor devices are used to sample a volume of light projected toward the back of a substrate (which faces a front of the substrate on which interconnect structures comprising multiple metallic and dielectric layers are mounted). BSI image sensor devices provide reduced destructive interference compared to a front-illuminated (FSI) image sensor device. The publication US 2015 /0 243 694 A1 The document discloses image sensors comprising a substrate that defines multiple pixel regions. The substrate defines a deep trench extending from a second surface of the substrate toward a first surface, separating the multiple pixel regions. A photoelectric conversion region is provided within each of the multiple pixel regions of the substrate. The image sensors also include a flat device insulation layer on the first surface of the substrate. The flat device insulation layer defines an active region within each of the pixel regions, and the negative fixed charge layer contacts the flat device insulation layer. BRIEF DESCRIPTION OF THE DRAWINGS The aspects of this revelation are best understood from the following detailed description, when read with the accompanying figures. It should be noted that, as is common practice in the field, several features are not drawn to scale. Indeed, the dimensions of the various features may have been enlarged or reduced at will for the sake of clarity of discussion. 1 Figure shows a cross-sectional view of some embodiments of a CMOS (complementary metal oxide semiconductor) image sensor, which has a photodiode surrounded by a backside deep trench insulation (BDTI) structure. 2 Figure 1 shows a cross-sectional view of some additional embodiments of a CMOS image sensor comprising a photodiode surrounded by a backside deep trench insulation (BDTI) structure. 3 Figure 1 shows a cross-sectional view of some additional embodiments of a CMOS image sensor comprising a photodiode surrounded by a backside deep trench insulation (BDTI) structure. 4 Figure 1 shows a cross-sectional view of some additional embodiments of a CMOS image sensor comprising a photodiode surrounded by a backside deep trench insulation (BDTI) structure. 5A Figure shows a cross-sectional view of some embodiments of an integrated chip comprising an image sensor having a photodiode surrounded by a backside deep trench insulation (BDTI) structure. 5B Figure 1 shows a cross-sectional view of some additional embodiments of an integrated chip comprising an image sensor having a photodiode surrounded by a backside deep trench insulation (BDTI) structure. 6 to 11 Figures depict some embodiments of cross-sectional views showing a method for forming a CMOS image sensor comprising a photodiode surrounded by a backside deep trench insulation (BDTI) structure. 12 Figure 1 shows a flowchart of some embodiments of a method for forming a CMOS image sensor comprising a photodiode surrounded by a backside deep trench insulation (BDTI) structure. DETAILED DESCRIPTION Improved CMOS image sensors and an improved manufacturing process are provided according to claims 1, 13, and 18. The following disclosure provides many different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. For example, the formation of a first feature over or on a second feature in the following description may include embodiments in which the first and The second features are formed in direct contact, and may also include embodiments in which additional features can be formed between the first and second features, so that the first and second features may not be in direct contact. Furthermore, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition serves for simplicity and clarity and does not in itself prescribe a relationship between the various embodiments and/or the configurations discussed. Furthermore, spatial reference terms, such as "below," "under," "lower," "above," "over," "upper," and the like, can be used here for easier description of the relationship between an element or feature and one or more other elements or features, as illustrated in the figures. These spatial reference terms are intended to accommodate different orientations of