DE-102018204921-B4 - Semiconductor device

Abstract

Semiconductor device (10) comprising: a substrate (14) comprising an insulating plate (11) with a front surface and a plurality of circuit structures (12a-12h) formed on the front surface of the insulating plate; a plurality of protective films (12a1, 12a2, 12b1-12b3, 12c1-12c3, 12d1, 12d2, 12e1-12e14) formed on at least facing side sections of the plurality of circuit structures (12a-12h), such that bond regions (15a1-16g1) are exposed on front surfaces of the plurality of circuit structures (12a-12h); and a plurality of components (15a-15c, 16a-16g, 17a-17e) bonded via solder (18a-18i) to the bond regions (15a1-16g1) of the plurality of circuit structures (12a - 12h), wherein: the majority of protective films (12a1, 12a2, 12b1-12b3, 12c1-12c3, 12d1, 12d2, 12e1-12e14) are formed on at least the facing side sections and on edge sections of the front surfaces of the majority of circuit structures (12a-12h) along the side sections; and the majority of protective films (12a1, 12a2, 12b1-12b3, 12c1-12c3, 12d1, 12d2, 12e1-12e14) are made of metal.

Inventors

• Kenshi KAI
• Rikihiro Maruyama

Assignees

• FUJI ELECTRIC CO., LTD.

Dates

Publication Date

20260513

Application Date

20180329

Priority Date

20170630

Claims (8)

1. Semiconductor device (10) comprising: a substrate (14) comprising an insulating plate (11) with a front surface and a plurality of circuit structures (12a-12h) formed on the front surface of the insulating plate; a plurality of protective films (12a1, 12a2, 12b1-12b3, 12c1-12c3, 12d1, 12d2, 12e1-12e14) formed on at least facing side sections of the plurality of circuit structures (12a-12h), such that bond regions (15a1-16g1) are exposed on the front surfaces of the plurality of circuit structures (12a-12h); and a plurality of components (15a-15c, 16a-16g, 17a-17e) bonded via solder (18a-18i) to the bond regions (15a1-16g1) of the plurality of circuit structures (12a-12h), wherein: the plurality of protective films (12a1, 12a2, 12b1-12b3, 12c1-12c3, 12d1, 12d2, 12e1-12e14) are formed on at least the facing side sections and on edge sections of the front surfaces of the plurality of circuit structures (12a-12h) along the side sections; and the majority of protective films (12a1, 12a2, 12b1-12b3, 12c1-12c3, 12d1, 12d2, 12e1-12e14) are made of metal.
2. Semiconductor device (10) according to Claim 1 , wherein at least one of the majority of components (15a-15c, 16a-16g, 17a-17e) is bonded such that it extends between adjacent circuit structures of the majority of circuit structures (12a-12h).
3. Semiconductor device (10) according to Claim 1 , wherein the majority of components (15a-15c, 16a-16g, 17a-17e) is at least one from the group: semiconductor elements (15a, 15b, 15d) and contact elements (16a-16g).
4. Semiconductor device (10) according to Claim 2 , where the majority of components (15a-15c, 16a-16g, 17a-17e) are electronic components (15c).
5. Semiconductor device (10) according to Claim 1 , where the majority of circuit structures (12a-12h) are formed from copper or copper alloy.
6. Semiconductor device (10) according to Claim 1 , wherein the majority of first protective films (12a1, 12a2, 12b1-12b3, 12c1-12c3, 12d1, 12d2, 12e1-12e14) are formed of nickel or nickel alloy.
7. Semiconductor device (10) according to Claim 1 , wherein the solder (18a-18i) is a lead-free solder comprising at least one alloy selected from a tin-silver-copper alloy, a tin-zinc-bismuth alloy, a tin-copper alloy and a tin-silver-indium-bismuth alloy as the main component.
8. Semiconductor device (10) according to Claim 7 , wherein nickel, germanium, cobalt or silicon is added to the solder (18a-18i).

Description

BACKGROUND OF THE INVENTION 1. Field of the invention The embodiments discussed herein relate to a semiconductor device. 2. Background of the related prior art Semiconductor devices include semiconductor elements such as IGBTs (insulated bipolar gate transistors) and power MOSFETs (metal oxide semiconductor field-effect transistors). These semiconductor devices are used, for example, as power conversion devices. A semiconductor device comprises a substrate with an insulating plate and a plurality of circuit structures formed on a front surface of the insulating plate. Semiconductor elements and external terminals are arranged on the circuit structures, and signals applied by the external terminals are fed into the semiconductor elements via the circuit structures. Cylindrical contact elements are used when attaching the external terminals to the circuit structures. The external terminals are pressed into contact elements that are bonded to the circuit structures using solder, thus electrically connecting the external terminals to the circuit structures via the contact elements. See, for example, US patent application no. US 2009 / 0 194 884 A1 . In the semiconductor device described above, a plating process using nickel or the like is performed on the surfaces of the circuit structures. This suppresses corrosion of the circuit structures, thereby preventing substances produced by corrosion (hereinafter referred to as "corrosion products") from causing short circuits between the circuit structures. Circuit structures that have undergone a plating process are less wettable with respect to the solder, making it difficult to avoid the formation of voids within the solder. This means that when components such as cylindrical contact elements and semiconductor elements are bonded to clad circuit structures via solder, it is not possible to achieve sufficient bond strength for the components on the circuit structures. WO 2017/006 661 A1 Figure 1 shows a device in which a ceramic-metal printed circuit board and a metal plate are connected via a bonding layer on both surfaces of the ceramic substrate. A metal film is provided on the surface of the metal plate located on one surface of the ceramic substrate, and the ceramic-metal printed circuit board is located on the surface of a metal plate located on the other surface. There is also a section where no metal coating is provided. US 2017/0 025 344 A1 Figure 1 shows a semiconductor module comprising an insulated printed circuit board containing an insulating substrate, a first conductive plate located on a first major surface of the insulating substrate and within the outer edges of the insulating substrate, and a second conductive plate located within the outer edges of the insulating substrate on a second major surface of the insulating substrate, opposite the first major surface. Furthermore, the interfaces between the first major surface of the insulating substrate and the side faces of the first conductive plate are covered with an ionic gel containing an ionic liquid. US 2007 / 0 246 833 A1 shows a semiconductor module with different solder compositions. BRIEF SUMMARY OF THE INVENTION The present embodiments were developed in light of the problem described above and aim to provide a semiconductor device capable of preventing a decrease in the bond strength of components on circuit structures. To this end, a semiconductor device comprising the features of the independent claim is provided. The dependent claims relate to exemplary embodiments. The following aspects serve to better understand the invention. In one aspect of the embodiments, a semiconductor device is provided comprising: a substrate comprising an insulating plate and a plurality of circuit structures formed on a front surface of the insulating plate; a plurality of protective films formed on at least facing side sections of the plurality of circuit structures to expose bond regions on front surfaces of the plurality of circuit structures; and a plurality of components bonded to the bond regions of the plurality of circuit structures using solder. BRIEF DESCRIPTION OF THE DRAWINGS 1 is a top view of a semiconductor device according to a first embodiment;2 is a cross-sectional view of the semiconductor device according to the first embodiment;3 is a top view of the semiconductor device according to the first embodiment, with components omitted;4 shows circuit structures on a substrate of a semiconductor device which is a modification of the first embodiment;5 is a top view of a main part of a semiconductor device according to a second embodiment;6 is a cross-sectional view of a main part of a semiconductor device according to a second embodiment;7 is a top view of a main part of a semiconductor device according to a third embodiment;8 is a first cross-sectional view of a main part of the semiconductor device according to the third embodiment; and9 is a second cross-sectional view of a main part of th