DE-102018215244-B4 - Processing methods for a wafer

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Abstract

A processing method for a wafer (11) for processing a wafer (11), wherein a component (15) having several elevations (17) is formed in each of areas of a front surface of the wafer (11) which is divided by several intersecting division lines (13) formed in an intersecting manner, wherein the processing method for a wafer (11) comprises: a training step for a first cut groove (23) to form first cut grooves (23) each having a depth corresponding to a finished thickness of each of the component chips (27), by a first cutting blade (14) having a first thickness, along the parting lines (13) of a front surface side (11a) of the wafer (11); a scanning step of the front surface of the wafer (11) with visible light using a scanning unit (18) in which an alignment mark is detected and the parting line (13) to be cut is detected based on the alignment mark, prior to the training step for a first cut groove; a sealing step to seal the front surface of the wafer (11) including the first cut grooves (23) with a sealing material (20) after the training step for a first cut groove (23) has been carried out; a grinding step to grind the wafer from a rear surface side (11b) of the wafer (11) to the finished thickness of each of the device chips (27) to expose the sealing material (20) in the first cut grooves (23) after the sealing step has been performed; an alignment step for picking up the front surface of the wafer (11) by the sealing material (20) by the pickup medium (18) using infrared light from the front surface (11a) of the wafer (11), detecting an alignment mark and detecting the parting line (13) to be cut based on the alignment mark after the grinding step has been performed; and a division step for cutting the sealing material (20) in the first cut grooves (23) by a second cutting blade (14A) having a second thickness smaller than the first thickness of the first cutting blade (14), along the division lines (13) from the front surface (11a) of the wafer (11) and parts of the wafer (11) into individual device chips (27), each of which has its front surface and four side surfaces surrounded by the sealing material (20) after the alignment step has been performed, wherein in the sealing step the front surface of the wafer (11) is sealed with a sealing material (20) which has such a transmission property that infrared rays which are to be absorbed by the infrared light receiving means (18) pass through the sealing material (20).

Inventors

Katsuhiko Suzuki
Yuri Ban

Assignees

DISCO CORPORATION

Dates

Publication Date: 20260513
Application Date: 20180907
Priority Date: 20170908

Claims (3)

A processing method for a wafer (11) for processing a wafer (11), wherein a component (15) having multiple elevations (17) is formed in each of regions of a front surface of the wafer (11) divided by multiple intersecting parting lines (13) formed in an intersecting manner, the processing method for a wafer (11) comprising: a forming step for a first cut groove (23) for forming first cut grooves (23) having a depth corresponding to a finished thickness of each of the component chips (27), by a first cutting blade (14) having a first thickness, along the parting lines (13) of a front surface face (11a) of the wafer (11); a scanning step of the front surface of the wafer (11) with visible light using a scanning unit (18), in which an alignment mark is detected and the parting line (13) to be cut is detected based on the alignment mark, prior to the formation step for a first cut groove; a sealing step to seal the front surface of the wafer (11) including the first cut grooves (23) with a sealing material (20) after the formation step for a first cut groove (23) has been performed; a grinding step to grind the wafer from a rear surface face (11b) of the wafer (11) to the finished thickness of each of the device chips (27) to expose the sealing material (20) in the first cut grooves (23) after the sealing step has been performed; an alignment step for picking up the front surface of the wafer (11) through the sealing material (20) by the picking agent (18) using infrared light from the front surface (11a) of the wafer (11), detecting an alignment mark and detecting the parting line (13) to be cut based on the alignment mark after the grinding step has been performed; and a parting step for cutting the sealing material (20) in the first cut grooves (23) by a second cutting blade (14A) having a second thickness less than the first thickness of the first cutting blade (14), along the parting lines (13) from the front surface (11a) of the wafer (11) and dividing the wafer (11) into individual device chips (27), each of which has its front surface and four side surfaces surrounded by the sealing material (20) after the alignment step. step was carried out wherein in the sealing step the front surface of the wafer (11) is sealed with a sealing material (20) which has such a transmission property that infrared rays which are to be absorbed by the infrared light receiving means (18) pass through the sealing material (20).
Processing method for a wafer (11) according to Claim 1 , wherein the infrared light receiving means (18) used in the alignment step includes an InGaAs receiving element.
Processing method for a wafer (11) according to Claim 1 or 2 , wherein the sealing material (20) is a composition comprising 10.3% epoxy plastic or epoxy plastic plus phenolic plastic, 85.3% silica filler, 0.1% to 0.2% carbon black and 4.2% to 4.3% other ingredients by mass percent.

Description

Technical field The present invention relates to a processing method for a wafer for processing a wafer to form a 5S-shaped pack. Description of the state of the art As a way to achieve miniaturization and higher density of various components such as large-scale integrated circuits (LSIs) and NAND flash memory, chip-size packages (CSPs) have been widely used and implemented in mobile phones, smartphones, and similar devices. Furthermore, in recent years, CSPs have evolved into CSPs where not only the front surface but all side surfaces of a chip are sealed with a sealing material; this is known as a 5S-shaped package. The conventional 5S-shaped package is produced by the following steps. (1) Forming components (circuit) and external interconnect terminals, called protrusions, on a front surface of a semiconductor wafer (hereinafter sometimes referred to simply as the wafer). (2) Cutting the wafer along parting lines from a front surface of the wafer to form cut grooves, each having a depth corresponding to the finished thicknesses of each of the component chips. (3) Sealing the front surface of the wafer with a sealing material containing carbon black. (4) Grinding a rear surface of the wafer to a finished thickness of each of the component chips to expose the sealing material in the cut grooves. (5) Performing an alignment in which, since the front surface of the wafer is sealed with the sealing material containing carbon black, the sealing material is removed from a large section of the front surface of the wafer to expose the alignment markings such as target patterns, and the parting lines to be cut are detected based on the alignment markings. (6) Cutting the wafer along the division lines from the front surface of the wafer based on the orientation and dividing the wafer into 5S-shaped packs, each of which has its front surface and one side surface sealed with the sealing material. Since the front surface of the wafer is sealed with the sealing material containing carbon black, as described above, the components and the like formed on the front surface of the wafer cannot be seen with the naked eye. To enable alignment by solving this problem, the present inventor has developed a technique in which, as described in paragraph 5 above, the sealing material is removed from the circumferential section of the front surface of the wafer to expose the alignment markers, such as target patterns, and based on these target patterns, the parting line to be cut is detected, thus performing alignment (see the JP 2013 - 74 021 A and the JP 2016 - 15 438 A ). JP 2017 - 22 280 A discloses a processing method for a wafer for processing a wafer in which an imaging device and a control device are provided that perform image processing such as pattern matching to align the wafer. JP 2015 - 23 078 A discloses an alignment unit equipped with a first and a second imaging unit, wherein the first imaging unit comprises a standard camera and the second imaging unit comprises an infrared camera, and the two imaging units are arranged side by side. US 6 338 980 B1 discloses a processing method for a wafer for processing a wafer in which a groove is introduced into the wafer. PRESENTATION OF THE INVENTION However, according to the alignment process described in the aforementioned patent documents, a step is required to remove the sealing material from the perimeter section of the wafer using a wide cutting blade attached to a spindle to cut the edge, instead of a cutting blade for parting. Replacing the cutting blade and removing the sealing material from the perimeter section is labor-intensive. Edge cutting is removed, which causes low productivity. Therefore, an objective of the present invention is to provide a processing method for a wafer in which an alignment step can be carried out by the sealing material containing carbon black, which is applied to coat a front surface of the wafer. In accordance with one aspect of the present invention, a wafer machining method is provided for machining a wafer in which a component having multiple raised areas is formed in each of regions of a front surface divided by multiple intersecting parting lines formed in an intersecting manner. The wafer machining method comprises: a first cut groove forming step for forming first cut grooves, each having a depth corresponding to the thickness of each of the component chips, by a first cutting blade having a first thickness, along the parting lines of a front surface face of the wafer; a visible light scanning step of the front surface of the wafer by means of a scanning unit, in which an orientation mark is detected and the parting line to be cut is detected based on the orientation mark, prior to the first cut groove forming step; a sealing step to seal the front surface of the wafer, including the first cut grooves, with a sealing material after the first cut groove training step has been performed; a grinding step to grind the wafer from a