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DE-102021103422-B4 - Semiconductor structure and method for measuring a breakdown voltage

DE102021103422B4DE 102021103422 B4DE102021103422 B4DE 102021103422B4DE-102021103422-B4

Abstract

Semiconductor structure (2) for measuring a breakdown voltage of a pn junction, wherein the semiconductor structure (2) comprises: a substrate (4); a sensor element (6) in the substrate (4) comprising an optically active region (8) which includes the pn junction, wherein the sensor element (6) is configured to apply a blocking bias to the pn junction; and an emitter (10) adjacent to the optically active region (8) in the substrate (4), wherein the emitter (10) is separated from the optically active region (8) by a trench insulation (12), and wherein the emitter (10) is configured to provide charge carriers to the optically active region (8) to trigger the breakdown of the pn junction when the blocking bias is equal to or greater than the breakdown voltage.

Inventors

  • Alexander Zimmer
  • Daniel Gäbler

Assignees

  • X-FAB Global Services GmbH

Dates

Publication Date
20260513
Application Date
20210213
Priority Date
20200219

Claims (16)

  1. Semiconductor structure (2) for measuring a breakdown voltage of a pn junction, wherein the semiconductor structure (2) comprises: a substrate (4); a sensor element (6) in the substrate (4) comprising an optically active region (8) encompassing the pn junction, wherein the sensor element (6) is configured to apply a reverse bias to the pn junction; and an emitter (10) adjacent to the optically active region (8) in the substrate (4), wherein the emitter (10) is separated from the optically active region (8) by a trench insulation (12), and wherein the emitter (10) is configured to provide charge carriers to the optically active region (8) to trigger the breakdown of the pn junction when the reverse bias is equal to or greater than the breakdown voltage.
  2. Semiconductor structure (2) according to Claim 1 , wherein the emitter (10) is configured to provide charge carriers when it is biased in the blocking direction.
  3. Semiconductor structure (2) according to Claim 1 or 2 , wherein the emitter (10) is configured to be reverse biased in use by a voltage in the range of 1 V to 5 V.
  4. Semiconductor structure (2) according to Claim 1 , 2 or 3 , wherein the emitter (10) comprises a heavily n-doped region (16) and a heavily p-doped region (18).
  5. Semiconductor structure (2) according to Claim 4 , wherein the strongly n-doped region (16) is self-adjusted at an edge of the s trench isolation (12).
  6. Semiconductor structure (2) according to Claim 4 or 5 , wherein the heavily n-doped region (16) is self-adjusted relative to the heavily p-doped region (18).
  7. Semiconductor structure (2) according to one of the preceding claims, wherein the sensor element (6) further comprises a peripheral area (22) surrounding the optically active area (8) and comprising a circuit connected to the optically active area (8).
  8. Semiconductor structure (2) according to Claim 7 , wherein the emitter (10) is arranged within the peripheral area (22).
  9. Semiconductor structure (2) according to Claim 7 or 8 , wherein the emitter (10) comprises a plurality of emitter regions (10a, 10b, 10c, 10d) arranged in the peripheral region (22).
  10. Semiconductor structure (2) according to Claim 9 , wherein the emitter regions (10a, 10b, 10c, 10d) are arranged symmetrically around the optically active region (8).
  11. Semiconductor structure (2) according to Claim 9 or 10 , in which the plurality of emitter regions (10a, 10b, 10c, 10d) includes four emitter regions (10a, 10b, 10c, 10d).
  12. Semiconductor structure (2) according to Claim 9 , 10 or 11 , wherein each emitter region (10a, 10b, 10c, 10d) has an essentially triangular shape when viewed from above.
  13. Image sensor comprising a variety of semiconductor structures (2) according to one of the Claims 1 until 12 .
  14. Method for measuring a breakdown voltage of a pn junction with a semiconductor structure (2) according to one of the Claims 1 until 12 .
  15. A method for measuring the breakdown voltage of a pn junction, comprising: Providing a semiconductor structure (2) comprising a substrate (4), a sensor element (6) in the substrate (4) comprising an optically active region (8) encompassing the pn junction, and an emitter (10) adjacent to the optically active region (8) in the substrate (4), wherein the emitter (10) is separated from the optically active region (8) by a trench insulation (12); Applying a first reverse bias to the pn junction; Applying a second reverse bias to the emitter (10) to cause the emitter (10) to provide charge carriers to the optically active region (8); Detecting the breakdown of the pn junction by monitoring a current output by the semiconductor structure (2); and Determining the breakdown voltage from the first reverse bias when the breakdown is detected.
  16. Procedure according to Claim 15 , which further includes: deactivating the emitter (10) by removing or reducing the second blocking bias; and activating the emitter (10) after a period of time in order to determine the breakdown voltage at a later time.

Description

SPECIALIZATION The invention relates to the determination of the breakdown voltage and in particular the determination of the breakdown voltage of a pn junction in a sensor component. BACKGROUND Photosensors, such as single-photon avalanche diodes (SPADs), are used in a so-called Geiger mode to count individual photons. In this operating mode, the device is reverse-biased via the breakdown voltage. Accurate determination of the breakdown voltage is crucial for the correct operation of the device. Existing methods use external heat or light sources to trigger breakdown in order to measure the breakdown voltage of the component. WO 2019/ 020 472 A1 Disclosure is made of a SPAD device comprising a single-photon avalanche diode and another single-photon avalanche diode integrated in the same device, the breakdown voltages of which are equal or differ by less than 10%. The single-photon avalanche diode is configured to enable triggering or to have a dark count rate higher than that of the other single-photon avalanche diode. US 2010 / 0 245 809 A1 Disclosing an avalanche photodiode and a sensor array comprising an array of the aforementioned avalanche photodiodes. SUMMARY Aspects of the invention provide semiconductor structures and methods for measuring the breakdown voltage as well as an image sensor according to the attached claims. Preferred embodiments are described below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS 1 shows a schematic representation of a cross-section of a semiconductor structure according to one embodiment;2 shows a schematic representation of a cross-section of part of a semiconductor structure according to one embodiment;3a shows a schematic top view of a semiconductor structure without an emitter;3b shows a schematic top view of a semiconductor structure with an emitter according to one embodiment; and4 shows a flowchart with the steps of a procedure for measuring the breakdown voltage according to one embodiment. DETAILED DESCRIPTION Avalanche photodiodes (APDs) operate below their breakdown voltage, while single-photon avalanche diodes (SPADs) operate above their breakdown voltage. In both cases, the breakdown voltage should be accurately determined for optimal device operation. The breakdown voltage of APDs and SPADs can be determined by triggering breakdown while simultaneously measuring the bias voltage. A fundamental condition for avalanche breakdown is the presence of at least one carrier in the avalanche junction to initiate the breakdown. In some applications, particularly in dark or dimly lit environments, this condition may not be reliably met, and the avalanche may not be triggered quickly enough. If charge carriers are lacking when the breakdown voltage is reached, breakdown may be delayed, resulting in an artificially high breakdown voltage being measured. Using the incorrect breakdown voltage value may apply the wrong bias voltage to the sensor device, which can disrupt its operation and/or reduce its performance. To overcome this problem, additional charge carriers can be provided at the avalanche transition by thermal charge carrier generation or by illuminating the sensor. If heating or illumination is not possible, the holding time of the measurement for a charge carrier to trigger the breakthrough can also be extended, but this can be detrimental to the clocking behavior. 1 Figure 1 shows a cross-sectional view of a semiconductor structure 2 according to one embodiment. The structure 2 comprises a substrate 4 (which is normally a silicon substrate), a sensor element 6 comprising an optically active region 8 formed in the substrate 4, and a photodiode with a pn junction, wherein the optically active region 8 corresponds to the depletion region around the pn junction, from which charge carriers generated by absorbed photons can be detected. The structure 2 further comprises a Emitter 10 comprises a plurality of emitter regions 10a and 10b (two shown) for providing charge carriers to the optically active region 8, thereby triggering the sensor element 6. If the sensor element 6 is, for example, a single-photon avalanche diode (SPAD), the emitter 10 can be biased to generate charge carriers that trigger an avalanche current in the optically active region 8. The emitter 10 is separated from the optically active region 8 by trench insulation (STI) 12. A backside stack 14 is arranged on the substrate 4, comprising metallization and intermetallic dielectric layers, and providing connections to the emitters 10a and 10b and to the sensor element 6. Each emitter region 10a and 10b can comprise a heavily n-doped region (n++) and a heavily p-doped region (p++), wherein the n++ region is preferably self-aligned relative to the p++ region, which can protect the device from process deviations. The emitter 10 can preferably be configured to operate at a relatively low reverse bias voltage in the range of 1 V to 5 V. The sensor device can comprise a