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DE-102024210791-A1 - Power field-effect transistor featuring a fin

DE102024210791A1DE 102024210791 A1DE102024210791 A1DE 102024210791A1DE-102024210791-A1

Abstract

The invention relates to a power field-effect transistor having a fin (FinFET) (100), wherein the power FinFET (100) comprises: a drain contact (1), a substrate region (2) of a first doping type oriented towards the drain contact (1), a drift region (3) of the first doping type having a base (31) with a side surface (32) and a mesa region forming the fin (33), a first passivation layer (5) partially oriented towards the fin (33) and extending partially parallel to the side surface (32), a gate contact (7) at least partially oriented towards the first passivation layer (5), a second passivation layer (8) separating the gate contact (7) and a source contact (6) oriented towards a top surface of the fin (33), wherein a material of the substrate region (2) and the drift region (3) is an ultra-wide bandgap semiconductor material.

Inventors

  • Jens Baringhaus
  • Chunwa Chan
  • Florin Udrea
  • Nazareno Donato
  • Tanya Trajkovic
  • Vasantha Pathirana

Assignees

  • Robert Bosch Gesellschaft mit beschränkter Haftung

Dates

Publication Date
20260513
Application Date
20241111

Claims (10)

  1. Power field-effect transistor having a fin (FinFET) (100), wherein the power FinFET (100) has: a drain contact (1), a substrate region (2) of a first doping type oriented towards the drain contact (1), a drift region (3) of the first doping type having a base (31) with a side surface (32) and a mesa region forming the fin (33), a first passivation layer (5) partially oriented towards the fin (33) and extending partially parallel to the side surface (32), a gate contact (7) at least partially oriented towards the first passivation layer (5), a second passivation layer (8) separating the gate contact (7) and a source contact (6) oriented towards a top surface of the fin (33), wherein a material of the substrate region (2) and the drift region (3) is an ultra-large bandgap semiconductor material, characterized in that the Power FinFET (100) has a barrier layer (10, 12) oriented towards the side surface (32), wherein the barrier layer (10, 12) has a second doping type.
  2. Power FinFET (100) according to Claim 1 , characterized in that the barrier layer (10, 12) is at least partially made of a first material, wherein the first material is the same as the material of the substrate area (2).
  3. Power FinFET (100) according to Claim 1 or 2 , characterized in that the barrier layer (10, 12) is at least partially made of a second material, wherein the second material is different from the material of the substrate area.
  4. Power FinFET (100) according to one of the preceding claims, characterized in that the barrier layer (10, 12) extends from an edge of the base (31) to the fin (33).
  5. Power FinFET (100) according to one of the preceding claims, characterized in that the barrier layer (10, 12) is multi-part.
  6. Power FinFET (100) according to one of the preceding claims, characterized in that the FinFET (100) has a metal layer (11) and/or a conductive layer (13) which are aligned with the second passivation layer (8) and extend from the base (31) and/or the barrier layer (10, 12).
  7. Power FinFET (100) according to Claim 6 , characterized in that the metal layer (11) and/or the conductive layer (13) extend between the lateral surface (32) and the first passivation layer (5) towards the fin (33).
  8. Power FinFET (100) according to Claim 6 or 7 , characterized in that the metal layer (11) and/or the conductive layer (13) extend/extend alongside the barrier layer (10, 12).
  9. Power FinFET (100) according to one of the Claims 6 until 8 , characterized in that the FinFET (100) has a circuit (14) comprising a first connection point, a first resistor (15), a second connection point, a second resistor (16) and a third connection point connected in series, wherein the first connection point is connected to the gate contact (7), the second connection point is connected to the metal layer (11) and/or the conductive layer (13), and the third connection point is grounded.
  10. Power FinFET (100) according to Claim 9 , characterized in that the circuit (14) has a diode (17) connected in parallel to the first resistor (15), wherein a forward direction of the diode (17) leads from the second connection point to the first connection point, and/or the circuit (14) has a capacitor (18) connected in parallel to the second resistor (16).

Description

Technical field The invention relates to a power field-effect transistor having a fin. background Junctionless field-effect transistors (FETs) are increasingly preferred for applications requiring comparatively high power transmission, particularly in the medium-voltage range of 1200 V to 3300 V, intended for automotive and industrial applications. FETs are vertical unipolar devices that incorporate one or more conductive layers of a doped type that exhibits low activation energy and numerous free charge carriers without compromising blocking capability or the dynamic response associated with deep layers. The conductive layer features a mesa region that forms a fin. This type of FET is called FinFET. Compared to planar FETs, the fin enables significantly faster switching times and higher current density. In addition to the conductivity layer, power FinFETs incorporate a passivation layer, preferably an oxide layer, for the gate. This passivation layer introduces energy barriers, preferably against both conduction and valence bands, and enables gate control within the fin. To ensure effective gate control, this passivation layer must exhibit only minimal interfacial traps at the semiconductor interface. To reduce leakage currents, it is known to use a material with a different doping type. Due to their remarkable material properties, such as low intrinsic carrier concentration and high electric field strength, ultra-wide bandgap semiconductor materials have emerged as a compelling option for conduction layers in power electronics. The exceptional impact ionization coefficients exhibited by these materials facilitate the reduction of the conduction layer size, for example, the drift region. Consequently, this miniaturization contributes to improved on-resistance compared to silicon and other wide bandgap semiconductors, such as 4H silicon carbide (4H-SiC) and gallium nitride (GaN), while maintaining equivalent blocking capabilities. Nevertheless, challenges related to inadequate doping control and premature breakdown failure have limited the potential improvement in electrical performance in device structures. Furthermore, power FinFETs fabricated from ultra-wide bandgap materials face various challenges and reliability issues, such as premature breakdown due to high gate leakage currents or oxide defects, gate control effectiveness dependent on interface quality (affecting on/off performance and mobility, particularly influenced by the interface between the passivation and conduction layers), inadequate operation in quadrant III due to the lack of an intrinsic body diode, and limited short-circuit performance when the conduction layer is made of a material with poor thermal conductivity. Alternative approaches to addressing premature breakdowns introduce a second-type layer that shifts the maximum electric field away from the passivation layer interface. However, this technique may not be as effective for ultra-wide-bandgap power FinFETs due to poor controllability of the second-type doping and high activation energy. To address the inadequate operation in quadrant III, an alternative layout was introduced, featuring a Schottky diode with a trench metal-oxide-semiconductor barrier and a depletion-free FET. However, the disadvantage of this approach lies in the limited availability of active device area. Furthermore, techniques employing p-shielding typically stipulate that the potential of this layer must be coupled to the source terminal and thus grounded throughout the device's operation. This approach has certain limitations, as the presence of a significant depletion region can limit the forward current. Therefore, there is a great need for a power FinFET that uses an ultra-wide bandgap semiconductor material for conductivity layers in order to exploit its advantages while simultaneously overcoming the aforementioned disadvantages. This invention aims to overcome these problems. Disclosure of the invention This problem is solved in a surprisingly simple yet effective manner by a fin-type power field-effect transistor (FinFET), wherein the power FinFET comprises: a drain contact, a substrate region of a first doping type oriented towards the drain contact, a drift region of the first doping type having a base with a side face and a mesa region forming the fin, a first passivation layer partially oriented towards the fin and extending partially parallel to the side face, a gate contact at least partially oriented towards the first passivation layer, and a second passivation layer separating the gate contact from a source contact oriented towards a top face of the fin, wherein the substrate region and the drift region are ultra-wide bandgap semiconductor materials. The power FinFET is further characterized by the inclusion of a barrier layer oriented towards the side face, the barrier layer having a second doping type. The core idea of the invention is to reduce the electric field at the junction between th