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DE-102025116423-A1 - POWER AMPLIFIER

DE102025116423A1DE 102025116423 A1DE102025116423 A1DE 102025116423A1DE-102025116423-A1

Abstract

A power amplifier comprises: a first differential amplification unit, which includes an 11th voltage amplification unit that amplifies the voltage of a positive input power signal; an 11th broadband filter that feeds back a signal in a band of 8 to 16 GHz from the positive power signal to the 11th voltage amplification unit; a 12th voltage amplification unit that amplifies the voltage of a negative input power signal; and a 12th broadband filter that feeds back a signal in a band of 8 to 16 GHz from the negative power signal to the 12th voltage amplification unit; a transmission unit that transmits the two power signals to a subsequent stage; a second differential amplification unit, which includes a 21st power amplification unit that amplifies the power of the amplified positive power signal; and a 21st broadband filter that feeds back a signal in a band of 8 to 16 GHz from the positive power signal to the 21st power amplification unit. feedback, a 22nd power amplification unit that amplifies the power of the amplified negative power signal, and a 22nd broadband filter that feeds a signal in a band of 8 to 16 GHz back from the negative power signal to the 22nd power amplification unit, and a Output unit that integrates an amplified positive power signal and an amplified negative power signal into a single signal for output.

Inventors

  • Sang-hun Lee
  • Sang-Yeol Lee

Assignees

  • WAVEPIA CO., LTD.

Dates

Publication Date
20260513
Application Date
20250429
Priority Date
20241111

Claims (9)

  1. Power amplifier comprising: a first differential gain unit (1100) comprising an 11th voltage gain unit (1211) that amplifies a voltage of a positive input power signal (PA_IP), an 11th broadband filter (1111) that feeds back a signal in a band of 8 to 16 GHz from the positive power signal (PA_IP) to the 11th voltage gain unit (1211), a 12th voltage gain unit (1212) that amplifies a voltage of a negative input power signal (PA_IN), and a 12th broadband filter (1112) that feeds back a signal in a band of 8 to 16 GHz from the negative power signal (PA_IN) to the 12th voltage gain unit (1212); a transmission unit 1300, which transmits the positive power signal (PA_IP) amplified by the 11th voltage amplification unit (1211) and the negative power signal (PA_IN) amplified by the 12th voltage amplification unit (1212) to a subsequent stage; a second differential amplification unit (2200) comprising a 21st power amplification unit (2221) that amplifies a power of the amplified positive power signal (PA_IP), a 21st broadband filter (2121) that feeds back a signal in a band of 8 to 16 GHz from the positive power signal (PA_IP) to the 21st power amplification unit (2221), a 22nd power amplification unit (2222) that amplifies a power of the amplified negative power signal (PA_IN), and a 22nd broadband filter (2122) that feeds back a signal in a band of 8 to 16 GHz from the negative power signal (PA_IN) to the 22nd power amplification unit (2222); and an output unit (2400) that integrates a positive power signal (PA_IP) amplified by the 21st power amplification unit (2221) and a negative power signal (PA_IN) amplified by the 22nd power amplification unit (2222) into a single signal for output.
  2. Power amplifier according to Claim 1 , wherein the 11th broadband filter (1111) or the 12th broadband filter (1112) is configured with a resistor and a capacitor.
  3. Power amplifier according to Claim 2 , wherein the 21st broadband filter (2121) or the 22nd broadband filter (2122) is configured with a resistor and a capacitor.
  4. Power amplifier according to Claim 3 , wherein the 11th voltage gain unit (1211) is configured by connecting a first MOS transistor and a third MOS transistor in series, the positive power signal (PA_IP) is transferred to a gate of the first MOS transistor, a gate driver voltage is applied to a gate of the third MOS transistor to turn it on, and an 11th bypass capacitor is arranged between the gate of the third MOS transistor and ground.
  5. Power amplifier according to Claim 4 , wherein the 12th voltage amplification unit (1212) is configured by connecting a second MOS transistor and a fourth MOS transistor in series, the negative power signal (PA_IN) is transferred to a gate of the second MOS transistor, the gate driver voltage is applied to a gate of the fourth MOS transistor to turn it on, and a 12th bypass capacitor is arranged between the gate of the fourth MOS transistor and ground.
  6. Power amplifier according to Claim 5 , wherein the transmission unit (1300) removes a DC component from the amplified positive power signal (PA_IP) by passing it through a capacitor and transfers it to the 21st power amplification unit (2221), and removes a DC component from the amplified negative power signal (PA_IN) by passing it through a capacitor and transfers it to the 22nd power amplification unit (2222).
  7. Power amplifier according to Claim 6 , wherein the 21st power amplification unit (2221) is configured by connecting a fifth MOS transistor and a seventh MOS transistor in series, the positive power signal (PA_IP) is transferred to a gate of the fifth MOS transistor, a gate driver voltage is applied to a gate of the seventh MOS transistor to turn it on, and a 21st bypass capacitor is arranged between the gate of the seventh MOS transistor and ground.
  8. Power amplifier according to Claim 7 , wherein the 22nd power amplification unit (2222) is configured by connecting a sixth MOS transistor and an eighth MOS transistor in series, the negative power signal (PA_IN) is transferred to a gate of the sixth MOS transistor, the gate driver voltage is applied to a gate of the eighth MOS transistor to turn it on, and a 22nd bypass capacitor is arranged between the gate of the eighth MOS transistor and ground.
  9. Power amplifier according to Claim 8 , wherein the output unit (2400) integrates the amplified positive power signal (PA_IP) and the amplified negative power signal (PA_IN) into a and directs it through a transformer to an output.

Description

TECHNICAL AREA The present disclosure relates to a power amplifier and in particular to a power amplifier which feeds a differential power signal through a broadband filter, amplifies the fed-in signal in two stages of voltage amplification and power amplification, and integrates the amplified signals into a single signal for output in order to operate stably in a band of 8 to 16 GHz. BACKGROUND OF RELATED TECHNOLOGY In general, beam shaping techniques have found widespread use in various applications such as radar systems, mobile electronic devices and satellite communications due to their superior capabilities for automatically controlling signal alignment compared to conventional mechanical approaches. Recently, the powerful integration capabilities of silicon process technologies have helped to significantly reduce production costs compared to using individual components while maintaining the same or better quality, leading to a strong focus of research on beam shaping techniques in X-band and Q-band applications. However, power amplifiers are essential for X-band and Q-band beamforming circuits to ensure stable operation; however, it is difficult to design conventional power amplifiers to be immune to noise in a band of 8 to 16 GHz. State of the art PATENT DOCUMENT (Patent document 1) Korean patent publication no. 10-2024-00109402 (published on July 11, 2024) REVELATION TECHNICAL PROBLEM One aspect of the present disclosure is to provide a power amplifier that feeds a differential power signal through a broadband filter, amplifies the fed-back signal in two stages of voltage amplification and power amplification, and integrates the amplified signals to an output in order to operate stably in a band of 8 to 16 GHz. Technical problems that are to be solved by the present disclosure may not be limited to the problems described above, and other problems not mentioned herein will be clearly understood by those skilled in the art from the following description. TECHNICAL SOLUTION To achieve the aforementioned objectives, a power amplifier according to an embodiment of the present disclosure can comprise a first differential amplification unit 1100, comprising an 11th voltage amplification unit 1211 or gain amplification unit, which amplifies a voltage of a positive input power signal PA_IP, an 11th broadband filter 1111, which feeds back a signal in a band of 8 to 16 GHz from the positive power signal PA_IP to the 11th voltage amplification unit 1211, a 12th voltage amplification unit 1212 or gain amplification unit, which amplifies a voltage of a negative input power signal PA_IN, and a 12th broadband filter 1112, which feeds back a signal in a band of 8 to 16 GHz from the negative power signal PA_IN to the 12th voltage amplification unit 1212, and a transmission unit 1300. which transmits the positive power signal PA_IP, amplified by the 11th voltage amplification unit 1211, and the negative power signal PA_IN, amplified by the 12th voltage amplification unit 1212, to a subsequent stage; a second differential amplification unit 2200; a 21st power amplification unit 2221, which amplifies a portion of the amplified positive power signal PA_IP; a 21st broadband filter 2121, which feeds back a signal in a band of 8 to 16 GHz from the positive power signal PA_IP to the 21st power amplification unit 2221; a 22nd power amplification unit 2222, which amplifies a portion of the amplified negative power signal PA_IN; and a 22nd broadband filter 2122, which feeds back a signal in a band of 8 to 16 GHz from the negative power signal PA_IN to the 22nd power amplification unit. 2222 feedback, and an output unit 2400, which integrates a positive power signal PA_IP amplified by the 21st power amplification unit 2221 and a negative power signal PA_IN amplified by the 22nd power amplification unit 2222 into a signal in order to output it. Preferably, the 11th broadband filter 1111 or the 12th broadband filter 1112 can be configured with a resistor and a capacitor. Preferably, the 21st broadband filter 2121 or the 22nd broadband filter 2122 can be configured with a resistor and a capacitor. Preferably, the 11th voltage amplification unit 1211 can be configured by connecting a first MOS transistor and a third MOS transistor in series, the positive power signal PA_IP can be transferred to a gate of the first MOS transistor, a gate driver voltage can be applied to a gate of the third MOS transistor to turn it on, and an 11th bypass capacitor can be arranged between the gate of the third MOS transistor and ground. Preferably, the 12th voltage amplification unit 1212 can be configured by connecting a second MOS transistor and a fourth MOS transistor in series, the negative power signal PA_IN can be transferred to a gate of the second MOS transistor, the gate driver voltage can be applied to a gate of the fourth MOS transistor to turn it on, and a 12th bypass capacitor can be arranged between the gate of the fourth MOS transistor