DE-102025146712-A1 - SYSTEM AND METHOD FOR DETECTING SIGNALS WITH VARIABLE SAMPLING FREQUENCY

DE102025146712A1DE 102025146712 A1DE102025146712 A1DE 102025146712A1DE-102025146712-A1

Abstract

A test and measurement device comprises an input for receiving an input signal whose amplitude changes over time, the input signal being composed of a number of waveform segments; a sampler structured to sample the input signal at regular intervals to generate a sampled signal, the sampled signal being composed of a number of sample segments, each corresponding to one of the waveform segments; a capture processor with a slew rate controller structured to determine an instantaneous rate of change of the amplitude in a selected waveform segment of the input signal as the instantaneous slew rate of the input signal; and a sampling filter structured to store the sampled segment corresponding to the selected waveform segment of the input signal in a capture memory only during times when the instantaneous slew rate of the selected segment of the input signal exceeds a slew rate threshold. Methods are also described.

Inventors

Jonathan D. Clem

Assignees

TEKTRONIX, INC.

Dates

Publication Date: 20260513
Application Date: 20251112
Priority Date: 20251110

Claims (20)

A test and measurement device comprising: an input for receiving an input signal whose amplitude changes over time, wherein the input signal is composed of a number of waveform segments; a sampler structured to sample the input signal at regular intervals to generate a sampled signal, wherein the sampled signal is composed of a number of sampled segments, each corresponding to one of the waveform segments; a capture processor with a slew rate controller structured to determine an instantaneous rate of change of the amplitude in a selected waveform segment of the input signal as the instantaneous slew rate of the input signal; and a sampling filter structured such that it stores the sampled segment corresponding to the selected waveform segment of the input signal in a capture memory only during the times when the instantaneous slew rate of the selected segment of the input signal exceeds a slew rate threshold.
The test and measuring device according to Claim 1 , wherein the sampling filter is further structured such that it does not store the sampled segment in the acquisition memory if the instantaneous slew rate of the input signal does not exceed the slew rate threshold.
The test and measuring device according to Claim 2 , in which the sampling filter stores an indicator in the acquisition memory to show that the current slew rate of the input signal does not exceed the slew rate threshold.
The test and measuring device according to Claim 3 , where the indicator contains one or more values from a group that includes a time value, a number of cycles and a slew rate.
The test and measuring device according to Claim 4 , where the sampling filter stores an indicator for each sampled segment stored in the acquisition memory.
The test and measuring device according to Claim 4 or 5 , further comprising: a post-processor structured to generate an output waveform from one or more sampled segments retrieved from the acquisition memory and an indicator or other retrieved information stored in the acquisition memory in association with the one or more sampled segments.
The test and measuring device according to one of the Claims 2 until 6 , wherein the sampling filter includes a downsampler and wherein the sampling filter stores a downsampled version of the sampled segment in the acquisition memory during times when the instantaneous slew rate of the input signal does not exceed the slew rate threshold.
The test and measuring device according to one of the Claims 1 until 7 , wherein the slew rate detector is structured to compare an input amplitude value of a fixed-length data buffer with an output amplitude value of the fixed-length data buffer.
The test and measuring device according to one of the Claims 1 until 8 , further comprising a trigger processor with an output coupled to the sampling filter, wherein the sampling filter uses the output of the trigger processor as a control signal.
A method in a test and measurement instrument, comprising: receiving a waveform with one or more waveform segments; sampling the waveform to generate a sampled signal, the sampled signal being formed from a number of sampled segments, each corresponding to one of the one or more waveform segments; determining the slew rate of a current waveform segment; and storing the sampled segment corresponding to the current waveform segment in a capture memory, only if the slew rate of the current waveform segment exceeds a slew rate threshold.
The procedure according Claim 10 , which further includes that the sampled segment corresponding to the current waveform segment is not stored if the slew rate of the current waveform segment does not exceed the slew rate threshold.
The procedure according Claim 11 , which further includes storing an indicator in the acquisition memory that specifies a duration or number of cycles in which the slew rate of the current waveform segment does not exceed the slew rate threshold.
The procedure according to one of the Claims 10 until 12 , which further includes storing information on the slew rate in the acquisition memory, which Identify the slew rate of the current waveform segment.
The procedure according to one of the Claims 10 until 13 , which further includes storing sampling rate information in the acquisition memory, identifying a sampling rate at which the current waveform segment is stored in the acquisition memory.
The procedure according to one of the Claims 10 until 14 , wherein determining the slew rate of a current waveform segment involves comparing a first amplitude value stored in a fixed-size data buffer with a second amplitude value stored in the fixed-size data buffer.
The procedure according Claim 15 , where the first amplitude value is a value that has been stored in the fixed-size data buffer for the longest time, and where the second amplitude value is a next amplitude value to be stored in the fixed-size data buffer.
The procedure according Claim 15 or 16 , where the first amplitude value is a value that has been stored in the fixed-size data buffer for the longest time, and where the second amplitude value is the last value to be stored in the fixed-size data buffer.
A test and measurement device comprising: an input for receiving an input signal whose amplitude changes over time, the input signal being formed from one or more waveform segments; and one or more processors configured to perform operations to cause the one or more processors to: sample the input signal to produce a sampled signal, the sampled signal being formed from a number of sampled segments, each corresponding to one of the one or more waveform segments; determine the slew rate of a current waveform segment; and store the sampled segment corresponding to the current waveform segment in a capture memory only if the slew rate of the current waveform segment exceeds a slew rate threshold.
The test and measuring device according to Claim 18 , wherein the one or more processors are configured to perform operations that cause the one or more processors not to store the sampled segment corresponding to the current waveform segment if the slew rate of the current waveform segment does not exceed the slew rate threshold.
The test and measuring device according to Claim 18 or 19 , wherein the one or more processors are configured to determine the slew rate of a current waveform segment by comparing a first amplitude value stored in a fixed-size data buffer with a second amplitude value stored in the fixed-size data buffer.

Description

REFERENCE TO RELATED REGISTRATIONS This disclosure is a non-preliminary filing and claims precedence over the preliminary filing. US application no. 63/719,975 entitled “SLEW RATE DEPENDENT SAMPLE RATE FOR SIGNAL ACQUISITION”, which was filed on November 13, 2024, and the disclosure of which is incorporated herein by reference in its entirety. AREA OF TECHNOLOGY This disclosure relates to test and measurement equipment, in particular techniques for acquiring signals in a test and measurement equipment, such as an oscilloscope. BACKGROUND Modern test and measurement equipment, such as oscilloscopes, receive analog signals for testing from a device under test (DUT). One of the first steps in processing these analog signals is to convert them into digital signals using one or more analog-to-digital converters (ADCs). Conventional oscilloscopes have a fixed and continuous sampling rate per acquisition from the DUT, but this convention forces the user to compromise on detail in the settings. Because the size of the acquisition memory in oscilloscopes is fixed and limited, this compromise typically manifests as a trade-off between a sufficiently fast sampling rate of the input signal to capture detailed high-frequency features of the signal and a sufficiently slow rate to capture enough input signal to effectively analyze longer-term signal activity. Serial standards are a good example of this - users often face a conflict between a sufficiently fast rate to detect anomalies on each edge (monotony, overshoot/undershoot, etc.) and a sufficiently slow sampling rate to capture the entire serial bus protocol exchange in a single capture within the limited memory. In many test scenarios, there are periods of maximum importance, such as rapidly changing edges and an overview of the signal showing the temporal relationships between all captured edges. Other parts of the input signal, such as the dead time between edges, during which the signal exhibits a static or relatively stable voltage, are of little value to the user, except for their ability to accurately determine the temporal relationship between surrounding edges (counted in sampling rate "ticks"). However, since the sampling rate of an input signal is determined based on the entire signal—that is, both the important and the less important parts—much of the sampled signal has little value for the user, effectively wasting the already limited memory of the device. BRIEF DESCRIPTION OF THE DRAWINGS 1 is a schematic block diagram of a test and measurement device with a variable rate acquisition processor according to embodiments of the disclosure.2 illustrates when a fast sampling rate is required by the test and measuring device. 1 can be invoked according to embodiments of the disclosure.3 is a schematic block diagram showing exemplary components of the data acquisition processor 1 illustrated according to embodiments of the disclosure.4A illustrates a data structure scheme which, according to embodiments of the disclosure, is derived from the acquisition processor for variable-rate acquisition from the 1 and 3 can be used.4B shows another data structure scheme, which, according to embodiments of the disclosure, is implemented by the acquisition processor of the 1 and 3 can be used.4C shows another data structure scheme, which, according to embodiments of the disclosure, is performed by the acquisition processor according to 1 and 3 can be used. DESCRIPTION OF THE EXECUTION FORMS One solution for selecting a fixed signal acquisition rate according to embodiments of the disclosure is found in a variable-sampling-rate instrument that links the rate at which the digital samples of the analog signal are stored in the acquisition memory (the sampling rate, SR) to the slew rate (dV/dT) of the signal to be measured. When the transitions of the input signal are at or above a threshold slew rate, the sampling rate of the acquisition processor is increased, thereby capturing the rapidly changing signal with increased accuracy. Conversely, the acquisition processor reduces the sampling rate to compensate when the slew rate of the input signal is below the threshold slew rate, thus saving storage space in the acquisition memory. In this way, embodiments of the disclosure efficiently store a digitized waveform signal that is captured during periods of time. faster transitions capture more detail and minimize the amount of data required to store the digitized input signal during periods of static or low change. Although certain embodiments are described with reference to the input signal compared to a single threshold slew rate, embodiments of the invention are not limited to this. In other embodiments, the instantaneous slew rate of the input signal can be compared to multiple slew rate thresholds, and the acquisition processor selects one of many different acquisition rates based on the instantaneous slew rate of the input signal. Some embodiments include two, four, or up t