DE-112016006952-B4 - SEMICONDUCTOR DEVICE

Abstract

Semiconductor device comprising: - a semiconductor substrate (1) which has a front and a back side that are opposite each other; - a first metal layer (2) which is formed on the front side of the semiconductor substrate (1); - a second metal layer (3) for soldering, which is formed on the first metal layer (2); - a third metal layer (5) which is formed on the back side of the semiconductor substrate (1); and - a fourth metal layer (6) for soldering, which is formed on the third metal layer (5), wherein: - the second metal layer (3) has a greater thickness than the fourth metal layer (6), - the first and third metal layers (2, 5) are not divided into a pattern, - the second metal layer (3) is divided into a pattern and has a plurality of metal layers which are electrically connected to each other via the first metal layer (2), - the fourth metal layer (6) is divided into a pattern and has a plurality of metal layers which are electrically connected to each other via the third metal layer (5), and - the number of subdivided parts of the second metal layer (3) is greater than the number of subdivided parts of the fourth metal layer (6).

Inventors

• Sho Suzuki
• Tsuyoshi OSAGA

Assignees

• MITSUBISHI ELECTRIC CORPORATION

Dates

Publication Date

20260513

Application Date

20160608

Claims (5)

1. Semiconductor device comprising: - a semiconductor substrate (1) having a front and a back side facing each other; - a first metal layer (2) formed on the front side of the semiconductor substrate (1); - a second metal layer (3) for soldering, formed on the first metal layer (2); - a third metal layer (5) formed on the back side of the semiconductor substrate (1); and - a fourth metal layer (6) for soldering, which is formed on the third metal layer (5), wherein: - the second metal layer (3) has a greater thickness than the fourth metal layer (6), - the first and third metal layers (2, 5) are not divided into a pattern, - the second metal layer (3) is divided into a pattern and has a plurality of metal layers which are electrically connected to each other via the first metal layer (2), - the fourth metal layer (6) is divided into a pattern and has a plurality of metal layers which are electrically connected to each other via the third metal layer (5), and - the number of divided parts of the second metal layer (3) is greater than the number of divided parts of the fourth metal layer (6).
2. Semiconductor device according to Claim 1 , wherein the second and fourth metal layers (3, 6) contain nickel.
3. Semiconductor device comprising: - a semiconductor substrate (1) having a front and a back side facing each other; - a first metal layer (2) formed on the front side of the semiconductor substrate (1); - a second metal layer (3) for soldering formed on the first metal layer (2); - a third metal layer (5) formed on the back side of the semiconductor substrate (1); and - a fourth metal layer (6) for soldering, which is formed on the third metal layer (5), wherein: - the second metal layer (3) has a greater thickness than the fourth metal layer (6), - the second and fourth metal layers (3, 6) are made of amorphous nickel containing phosphorus, and - the second metal layer (3) has a higher phosphorus concentration than the fourth metal layer (6).
4. Semiconductor device according to one of the preceding claims, wherein the second and fourth metal layers (3, 6) are not crystallized.
5. Semiconductor device according to one of the preceding claims, wherein the semiconductor substrate (1) is a SiC substrate or a GaN substrate.

Description

Area The present invention relates to a semiconductor device in which metal layers for soldering are formed on both a front and a back side of a substrate. background MOSFETs, IGBTs, or high-voltage diodes are used as power semiconductor devices. Desirable requirements for a power semiconductor device include advantageous electrical properties such as low power loss, high damage tolerance, and small size, as well as low cost. Grinding semiconductor substrates to reduce thickness is a current trend in an attempt to achieve both advantageous electrical properties and a reduction in the chip unit price. A common design for a power semiconductor has traditionally involved forming a metal layer on one back electrode of a semiconductor substrate to react with a solder for soldering, while a metal wire connection for both electrodes was implemented on the front side. However, it is increasingly common to form metal layers for soldering on both the front and back sides of a substrate and to perform soldering on both sides, with the goal of achieving low power loss and size reduction. The printed matter JP 2013 - 194 291 A This document describes a semiconductor device and a method for its fabrication, for example in connection with an IGBT, in which warping or deformation due to the effects of thermal stress or the like is suppressed, particularly when an electrically conductive metal layer is formed, which is provided on the front and back of a wafer and is intended to exhibit particularly good wetting properties. Furthermore, no crystalline structure should be present in a coating layer corresponding to a change in temperature or voltage, and no cracks or the like should occur in a coating due to the formation of grain boundary voids. To achieve this, an amorphous, electroless deposited nickel coating layer and an electroless deposited gold coating layer are formed on a first main electrode, which is provided on a first main surface of a semiconductor substrate, and on a second main electrode, which is provided on a second main surface. The printed matter JP S64 - 20 752 U This concerns a thin-film solar cell in which a multitude of slot-like notches are provided on the back electrode of the thin-film solar cell using the silicon substrate. The printed matter US 2015 / 0 155 608 A1 Disclosure reveals an electrode structure for preventing cracking in a metal electrode due to heating during the manufacturing process when stacking an insulating resin and the metal electrode with different coefficients of thermal expansion. An electrode for a semiconductor circuit, stacked on an insulating resin substrate, has an electrode structure consisting of a main electrode with a slot created by cutting out a portion of the main electrode to prevent cracking during the manufacturing process due to the differing coefficients of thermal expansion with the substrate, and an auxiliary electrode that covers the slot in the main electrode. Instead of a slot, a bridge is formed at the point where the slot in the main electrode and the slot in the auxiliary electrode overlap, thus avoiding an area without an electrode. The publication LIN, CS [et al.]: Structural Evolution and Internal Stress of Nickel-Phosphorous Electrodeposits. In: Journal of The Electrochemical Society, Vol. 152, 2005, C370 - C375 This study describes properties of nickel-phosphorus or Ni-P electrodepositions that are best correlated with their phosphorus content and microstructure. The microstructural evolution and mechanical properties of deposits prepared from nickel sulfamate baths containing 0 to 40 g/ dm³ of phosphoric acid ( H₃PO₃ ) are investigated. The experimental results show that coarse nickel grains were significantly refined by the incorporation of phosphorus into the deposit. For example, with increasing phosphorus content from 0 to 14 wt% , the structure of the deposit changed stepwise from a coarse columnar structure to a mixture of columns and lamellae, then to a pronounced lamellar structure, and finally to a homogeneous, amorphous matrix with dispersed nanograins. Parallel to this structural evolution, the deposit exhibited a significant change in hardness and internal stress. These properties and relationships between microstructure and deposition are discussed with regard to lattice defects in the grains and proton discharges during electroplating. Summary Technical problem When the thickness or material of metal layers differs between the front and back sides of a semiconductor substrate, distortion of the substrate has been a common problem, causing cracks or voids in the solder and adversely affecting assembly. The trend of grinding semiconductor substrates to make them thinner has led to the dilemma of making this distortion more pronounced. A method has been disclosed in which the metal layers formed on both sides are crystallized for soldering by means of a heat treatment to counteract the stress applied from both sides and thus prevent